Electronics
Code | Completion | Credits | Range | Language |
---|---|---|---|---|
14ENIK | KZ | 4 | 2P+2C | Czech |
- Course guarantor:
- Vít Fábera
- Lecturer:
- Vít Fábera, Tomáš Musil
- Tutor:
- Vít Fábera, Tomáš Musil
- Supervisor:
- Department of Applied Informatics in Transportation
- Synopsis:
-
Analog and digital representation, radix systems, combinational logical circuits, Karnaugh maps, logical circuits realization, sequential logical circuits, integrated circuits SSI - VLSI, coders, decoders, counters, A/D and D/A convertors, programmable circuits (FPGA, SoC), computer terminology, computer architecture, single-chip controllers, RISC, CISC, memories, controllers, electrical buses.
- Requirements:
-
14ZEL1, 14ZLEN
- Syllabus of lectures:
-
1. Digital and analog representation, radix systems
2. Combinational logic circuits, minimization using maps
3. Minimization using maps, implementation of logic circuits
4. Sequential logic circuits
5. Sequential logic circuits, finite state machines
6. Encoders, decoders, counters, SSI - VLSI integrated circuits
7. Computer terminology, computer architecture, RISC, CISC
8. Microprocessor
9. Controller, memories
10. One-chip microcomputers
11. On-chip microcomputers, buses
12. Programmable circuits
13. A/D and D/A converters
14. Reserve
- Syllabus of tutorials:
-
1. Radix systems
2. Functions of combinational circuits, maps
3. Minimization using maps
4. Realization of combinational circuits
5. 1st laboratory exercise: Combinational logic circuits
6. Sequential logic circuits
7. Sequential logic circuits, finite state machines
8. Safety of communication - coding
9. 2nd laboratory exercise: Sequential logic circuits
10. One-chip microcomputers - development environment
11. 3rd laboratory exercise: One-chip microcomputers
12. Design for FPGA – demonstration, preparation for laboratory exercises
13. 4th laboratory exercise: Design of a logical circuit in FPGA
14. Alternative laboratory exercise
- Study Objective:
-
Obtaining knowledge concerning the electronics (according to Commission Regulation (EU) 1321/2014 - module 5) with the aim of acquiring ability to further understanding basic digital avionic systems.
- Study materials:
-
Vysoký P., Fábera V.: Základy elektroniky (Studijní modul 5), Akademické nakladatelství CERM, 2003
Fábera V.: Úvod do hardware počítačů, skriptum ČVUT FD, 2005
Douša J., Jáneš V.: Logické systémy, Praha, skriptum ČVUT, 1998
Pinker, Poupa: Číslicové systémy a jazyk VHDL, BEN, 2006
Katz R. H: Contemporary Logic Design
- Note:
- Time-table for winter semester 2024/2025:
- Time-table is not available yet
- Time-table for summer semester 2024/2025:
- Time-table is not available yet
- The course is a part of the following study plans:
-
- Bachelor TUL Full-Time from 2022/23 (compulsory course in the program)
- Bachelor TUL Full-Time from 2023/24 (compulsory course in the program)