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CZECH TECHNICAL UNIVERSITY IN PRAGUE
STUDY PLANS
2023/2024

Electronics

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Code Completion Credits Range Language
14ENIK KZ 4 2P+2C Czech
Garant předmětu:
Vít Fábera
Lecturer:
Vít Fábera, Tomáš Musil
Tutor:
Vít Fábera, Tomáš Musil
Supervisor:
Department of Applied Informatics in Transportation
Synopsis:

Analog and digital representation, radix systems, combinational logical circuits, Karnaugh maps, logical circuits realization, sequential logical circuits, integrated circuits SSI - VLSI, coders, decoders, counters, A/D and D/A convertors, programmable circuits (FPGA, SoC), computer terminology, computer architecture, single-chip controllers, RISC, CISC, memories, controllers, electrical buses.

Requirements:

14ZEL1

Syllabus of lectures:
Syllabus of tutorials:
Study Objective:

Obtaining knowledge concerning the electronics (according to Commission Regulation (EU) 1321/2014 - module 5) with the aim of acquiring ability to further understanding basic digital avionic systems.

Study materials:

Vysoký P., Fábera V.: Základy elektroniky (Studijní modul 5), Akademické nakladatelství CERM, 2003

Fábera V.: Úvod do hardware počítačů, skriptum ČVUT FD, 2005

Douša J., Jáneš V.: Logické systémy, Praha, skriptum ČVUT, 1998

Pinker, Poupa: Číslicové systémy a jazyk VHDL, BEN, 2006

Katz R. H: Contemporary Logic Design

Note:
Time-table for winter semester 2023/2024:
Time-table is not available yet
Time-table for summer semester 2023/2024:
06:00–08:0008:00–10:0010:00–12:0012:00–14:0014:00–16:0016:00–18:0018:00–20:0020:00–22:0022:00–24:00
Mon
Tue
Wed
roomHO:B-403
Fábera V.
Musil T.

11:30–13:00
(lecture parallel296)
Horská 3 (nová budova)
Elektrotechnická laboratoř
roomHO:B-403
Fábera V.
Musil T.

13:15–14:45
(parallel nr.296)
Horská 3 (nová budova)
Elektrotechnická laboratoř
Thu
Fri
The course is a part of the following study plans:
Data valid to 2024-04-23
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