CZECH TECHNICAL UNIVERSITY IN PRAGUE
STUDY PLANS
2023/2024

# Digital Design

Code Completion Credits Range Language
A8B37DIT Z,ZK 5 2P+2C Czech

In order to register for the course A8B37DIT, the student must have registered for the required number of courses in the group BEZBM no later than in the same semester.

Garant předmětu:
Stanislav Vítek
Lecturer:
Petr Skalický
Tutor:
Petr Skalický
Supervisor:
Synopsis:

The goal of this course is to introduce the philosophy of digital circuits' design, to provide formal description of combinational and sequential logical circuits, their functional blocks. Both mathematical and functional description, as well as minimization algorithms for output and transient functions of digital components and circuits is presented. Karnaugh maps, latch elements, finite-state Mealy and Moore machines are the essential part of the content. The subject matter discussed will be tested on the typical design of digital circuits.

Requirements:
Syllabus of lectures:

1. Digital circuits, basic concepts, feature of analog and digital processes. Digital information, digital waveforms, codes (BCD, Gray code). Boolean algebra, logic functions and their expression.

2. Number systems with various bases. Unsigned and signed binary numbers. Binary addition, subtraction and multiplication. Ones and twos complement technique, Booth?s Algorithm (shift-and-add technique).

3. Specification of logical functions using truth tables. De Morgan Transformations. Algebraic minimization of logical functions. Quine-McCluskey method. Implementation of logic functions with logic gates with different types of output (TTL, open collector, 3-state).

4. Minimization of logical functions using Karnaugh Maps. Larger, 5 and 6-independent variables Karnaugh maps. The rule of mirror line.

5. Combinational circuits. Solving tasks for combinational logics. Possibilities to solve sequential logic as combinational circuit (temperature regulation with hysteresis).

6. Transients in combinational logic circuits - delay of signals, hazard states, elimination of hazard.

7. Formal description of functional blocks. Vector notation. Equality comparator, multiplexer, demultiplexer, priority encoder. Sample decoder using 3-state function.

8. Latch, switching and memory components. Asynchronous and synchronous operation. RS latch NOR and NAND implementation. D-latch, D-type flip-flop, JK and T flip-flops. Sample implementations and time conditions for proper operation.

9. Registers, counters and memories. Modulo-16 binary counter. Shift registers. SIPO, PISO and SISO registers. Serial and parallel memory. Basic description of programmable logic devices (PLD, CPLD) and programmable gate arrays (PGA, FPGA).

10. Sequential circuits. Mathematical description of a finite state machine. Transient and output functions. Mealy and Moore machines. State diagram and table of transitions. Transformation of a Mealy machine into Moore machine. Minimization of transition tables of finite state sequential machines.

11. Minimization of transition table of a sequential circuit. Non-contradicting states. Encoding of a sample transition table of Mealy and Moore machine.

12. Formal description of functional devices. Binary comparator, binary adder, subtractor. Sample implementations.

13. Solving tasks for sequential logics (distribution regulation; device controllers; blocks in a factory).

14. Evaluation and verification of design stages of combinational and sequential logics. Summarization for examination.

Syllabus of tutorials:
Study Objective:

The goal of this course is to introduce the philosophy of digital circuits' design, to provide formal description of combinational and sequential logical circuits, their functional blocks. Both mathematical and functional description, as well as minimization algorithms for output and transient functions of digital components and circuits is presented. Karnaugh maps, latch elements, finite-state Mealy and Moore machines are the essential part of the content. The subject matter discussed will be tested on the typical design of digital circuits.

Study materials:

1. FABRICIUS, E. : Digital Design and Switching Theory CRC Press; 1 edition, 1992

2. GREGG, J.: Ones and Zeros: Understanding Boolean Algebra, Digital Circuits, and the Logic of Sets (IEEE Press Understanding Science &amp; Technology Series), 1998

3. WHITESITT, J.: Boolean Algebra and Its Applications (Dover Books on Computer Science), 2010

4. STANKOVIC, R., ASTOLA, J.: From Boolean Logic to Switching Circuits and Automata:Towards Modern Information Technology (Studies in Computational Intelligence), Springer, 2011

5. HASSOUN, S., SASAO, T.: Logic Synthesis and Verification (The Springer International Series in Engineering and Computer Science), Kluver Academic Publisher, 2001

6. HACHTEL, G., SOMENZI, F.: Logic Synthesis and Verification Algorithms, Springer, 2006

7. KOHAVI, Z., JHA, N.: Switching and Finite Automata Theory, Cambridge University Press, 2009

8. HOLDSWORTH, B., WOODS, C.: Digital Logic Design, Integra Software Services, UK Printed,FourthEdition, 2002

9. PEDRONI, V.: Circuit Design and Simulation with VHDL, MIT Press, 2010

10. NELSON, V., NAGLE, H., CARROLL, B., IRWIN, D.: Digital Logic Circuit Analysis and Design, 1995

Note:
Further information: