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CZECH TECHNICAL UNIVERSITY IN PRAGUE
STUDY PLANS
2024/2025
Faculties | School elective courses | ECTS courses catalogue | Settings | Česká verze
Welcome page > Faculty of Information Technology > Department of Digital Design > Side-Channel Analysis in Hardware

Side-Channel Analysis in Hardware

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Code Completion Credits Range Language
NI-HSC Z,ZK 4 2P+2C Czech
Course guarantor:
Vojtěch Miškovský
Lecturer:
Vojtěch Miškovský, Petr Socha
Tutor:
Vojtěch Miškovský, Martin Novotný, Matúš Olekšák, Petr Socha
Supervisor:
Department of Digital Design
Synopsis:

This course is dedicated to so-called side-channel information leakage in hardware devices. It focuses on both theoretical analysis and practical attacks. Students get familiar with various kinds of side channels and they get deeper insight in power attacks. Students learn to implement various profiled and non-profiled attacks and get familiar with higher-order

attacks. They also get practice in both designing the SCA countermeasures and analyzing the amount and characteristics of the side-channel information leakage.

Requirements:

Basic knowledge of cryptographic algorithms and their implementation in HW, recommended completion of MIE-BHW

(NIE-BVS) and/or MIE-HWB courses.

Syllabus of lectures:

1. Introduction to side channels, information leakage, power consumption/EM radiation measurements

2. Formal model for side-channel attacks, differential power analysis, correlation power analysis

3. Mutual information analysis, Kolmogorov-Smirnov analysis

4. Template attacks, theoretical and experimental security metrics

5. Countermeasures based on Additional Modules, hiding

6. Countermeasures based on Secure Logic Styles, hiding

7. Countermeasures based on Module Alteration, masking

8. Attacks on protected implementations, univariate and multivariate higher order attacks, combining function

9. Machine learning in side-channel analysis, neural networks

10. Leakage assessment

11. Remote side-channel attacks, attacks on radio, attacks in cloud

12. Fault attacks, fault injection, combined attacks

13. Reserve

Syllabus of tutorials:

1. Equipment introduction

2. Measurement introduction, timing attacks

3. Attack realisation I

4. Attack realisation II

5. Attack realisation III

6. Attack realisation IV

7. Countermeasures|hiding

8. Countermeasures|masking I

9. Countermeasures|masking II

10. Higher-order analysis

11. Attacking protected implementations

12. Finishing and evaluation

13. Reserve

Study Objective:
Study materials:

See courses.fit.cvut.cz

Note:
Further information:
https://courses.fit.cvut.cz/NI-HSC/
Time-table for winter semester 2024/2025:
06:00–08:0008:00–10:0010:00–12:0012:00–14:0014:00–16:0016:00–18:0018:00–20:0020:00–22:0022:00–24:00
Mon
roomT9:347
Miškovský V.
11:00–12:30
(lecture parallel1)
Dejvice roomTH:A-1048
Miškovský V.
14:30–16:00
(lecture parallel1
parallel nr.101)
Thákurova 7 (budova FSv)
HW lab mag.
Tue
Wed
Thu
Fri
Time-table for summer semester 2024/2025:
Time-table is not available yet
The course is a part of the following study plans:
Data valid to 2024-12-22
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