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CZECH TECHNICAL UNIVERSITY IN PRAGUE
STUDY PLANS
2023/2024
UPOZORNĚNÍ: Jsou dostupné studijní plány pro následující akademický rok.

Parallel Computer Architectures

The course is not on the list Without time-table
Code Completion Credits Range Language
MIE-PAP.16 Z,ZK 5 2P+1C English
Garant předmětu:
Lecturer:
Tutor:
Supervisor:
Department of Computer Systems
Synopsis:

The students gain a good overview of present parallel architectures and processors:parallel (ILP) microarchitectures, multithreaded and multicore processors, SoCs and MPSoCs, GPUs, and neural processors. Students also get hands-on experience with programming these systems.

Requirements:

Programming in C, parallel algorithms, computer architectures, principles of pipelining.

Syllabus of lectures:

1. SIMD architectures. programming, data dependency solutions, hiding latency of instructions.

2. VLIW architectures, programming, speculative solutions of data dependences, solutions for exceptions.

3. VLIW architectures for digital signal processing.

4. Multithreaded architectures.

5. Homogeneous multi-core architectures, memory subsystem, interrupts.

6. Heterogeneous multi-core architectures, shared and local memory, data transfers.

7. GPU architectures.

8. Programming environments and tools for multicore architectures.

9. Programming environments and tools for GPUs.

10. Systems on chip (SoC, NoC), switching networks, synchronous and asynchronous module interconnections.

11. Special parallel architectures, neural networks.

Syllabus of tutorials:

1. Introduction, assigning projects to students

2. Development tools

3. Parallel architecture programming I

4. Parallel architecture programming II

5. Parallel architecture programming III

6. Performance tests

7. Project consultation

8. Project consultation

9. Project consultation

10. Project consultation

11. Project presentation I

12. Project presentation II

13. Project presentation III

14. Assessment

Study Objective:

Nowadays, the importance of parallel computing rapidly grows due to the fact that Moore's law moved to parallelization of processors, multiprocessor systems are becoming a commodity, and even any PC end-user meets these systems. These trends bring challenges for SW developers, since common applications should be optimally parallelized. The goal of the module is to provide an overview of present parallel architectures in PCs, emebedded systems, mobile computing devices, GPUs. The aim is to teach students tools and methods for programming these systems.

Study materials:

1. El-Rewini, H., Abd-El-Barr, M. ''Advanced Computer Architecture and Parallel Processing''. Wiley-Interscience, 2005. ISBN 0471467405.

2. De Micheli, G., Benini, L. ''Networks on Chips: Technology and Tools''. Morgan Kaufmann, 2006. ISBN 0123705215.

3. Jerraya, A., Wolf, W. ''Multiprocessor Systems-on-Chips''. Morgan Kaufmann, 2004. ISBN 012385251X.

4. Keckler, S. W., Olukotun, K., Hofstee, H. P. ''Multicore Processors and Systems''. Springer, 2009. ISBN 1441902627.

Note:
Further information:
https://courses.fit.cvut.cz/MIE-PAP/
No time-table has been prepared for this course
The course is a part of the following study plans:
Data valid to 2024-03-27
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