CZECH TECHNICAL UNIVERSITY IN PRAGUE
STUDY PLANS
2023/2024
UPOZORNĚNÍ: Jsou dostupné studijní plány pro následující akademický rok.

# Computer System Structures

The course is not on the list Without time-table
Code Completion Credits Range Language
BE5B35SPS Z,ZK 6 3P+2L English
Garant předmětu:
Lecturer:
Tutor:
Supervisor:
Department of Control Engineering
Synopsis:

The subject introduces into basic hardware structures of computer systems, into their design and architecture. It explains technical background of classic computer systems and special computer for digital and logic control. It gives greater insight into parallel processing of data in computers.

Students obtain credits from practical exercises according to results of individual projects. The projects are solved on FPGA development boards Altera DE2 that are utilized in similar courses by many world's top universities.

Requirements:

Boolean algebra, logic circuits

Syllabus of lectures:

1. About structures computer systems. Binary numbers. Logic functions - their properties and implementations. Logical expressions versus logic gates. Boolean cube and designing logical functions by Karnaugh maps.

2. Boolean algebra. De Morgan's theorem. Problem SAT and BDD for logic functions. Basic combinational circuits and their designs. Decompositions and Shanonnova expansion. Group minimizations.

3. Synchronous and asynchronous sequential circuits, latches and flip-flops. Simple sequential circuits: registers, shift registers, and asynchronous counters.

4. Synchronous counter and hazards in logic circuits. Hazards in combinational circuits. Metastability of sequential circuits. Dealing with hazards in synchronous circuits. Examples of basic synchronous circuits. Synchronous circuit with ripple-carry and carry-lookahead.

5. HDL languages, basic design , multi-valued logic . Description of basic combinational circuits in VHDL. Composing circuits from components.

6. Sequential circuits in VHDL. Signals and VHDL attributes. Counters and shift registers . Testing and debugging circuits by VHDL testbenches.

7. Finite state machines (FSM) and their design. FSMs in VHDL. VHDL packages.

8. Controllers as special FSM. Phase look loop for frequency multiplication. Computer memories.

9. Data path in processors. The structure of general processor, design of 1bit processor and its testing. Design of peripherals.

10. NIOS processor structure with structure closed to MIPS processor, its basic architecture and programming. Modification of NIOS processor system.

11. Advanced Computer Systems Structures and Design, buses with peripherals, memory cache, interruptions. DMA transfer .

12. Practical interfacing for logic circuits. Connecting different types of interfaces and voltage levels. Power supply solutions and protections. Galvanic isolation.

13. Inside FPGA and ASIC circuits. Feedback shift registers used as a hardware accelerator for processor systems.

14. Structures of industrial computers, Programmable logic controllers and their differences from conventional computers.

Syllabus of tutorials:

1. Introduction, safety work in laboratory, demonstration and testing of the work with the Altera development board DE2.

2. Work in Quartus II development environment - creating a project, entering simple logic circuits, output assignments, compiling and downloading design into DE2 board. Independent work on examples of simple gates.

3. Creating lighthouse beacon shown in the first lecture in Quartus, simulation and adding shift register. Independent work on examples.

4. Assigning simple individual project No. 1. Independent work on the project.

5. Assigning more complex individual project No. 2. Independent work on the projects 1 and 2.

6. Independent work on projects 1 and 2.

7. Assigning project No.3 in VHDL. Independent work on the projects.

8. . Independent work on the projects.

9. Assigning complex projects 4 and 5.

10. Independent work on projects.

11. Independent work on projects.

12. Independent work on projects.

13. Independent work on projects, credit administration.

14. Individual work on projects, credit administration.

Study Objective:

Introduction into computers systems and basic constructions of computers peripherials.

Study materials:

1. John Y. Hsu: Computer Logic, Springer 2002, ISBN: 0387953043

2. Volnei A. Pedroni: Digital Electronics and Design with VHDL, MORGAN KAUFMANN 2008, ISBN: 0123742706

3. Enoch O. Hwang: Digital Logic and Microprocessor Design with VHDL, Thomson 2006, ISBN: 0-534-46593-5

4. Hachtel, G. D., Somenzi, F., Logic Synthesis and Verification Algorithms, Kluwer Academic. 1996.

5. DeMicheli G., Synthesis and Optimization of Digital Circuits, McGraw-Hill, 1994.

Note:
Further information:
https://moodle.dce.fel.cvut.cz/course/view.php?id=5
No time-table has been prepared for this course
The course is a part of the following study plans:
Data valid to 2024-05-28
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