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CZECH TECHNICAL UNIVERSITY IN PRAGUE
STUDY PLANS
2018/2019

Digital and Analog Circuits

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Code Completion Credits Range Language
BI-CAO Z,ZK 5 2P+2C Czech
Lecturer:
Martin Kohlík, Jan Kyncl (guarantor), Martin Novotný (guarantor)
Tutor:
Martin Kohlík, Jan Kyncl (guarantor), Martin Novotný (guarantor), Jaroslav Borecký, Šimon Branda, Ondřej Brém, Martin Daňhel, Robert Hülle, Ondřej Chládek, Dominik Igerský, Stanislav Jeřábek, Pavel Kubalík, Jaromír Mikušík, Vojtěch Miškovský, Vojtěch Nevřela, Vojtěch Pail, Jan Řezníček, Petr Socha, Filip Štěpánek, Daniel Vančura, Tomáš Zimmerhakl
Supervisor:
Department of Digital Design
Synopsis:

Students get the fundamental understanding of technologies underlying electronic digital systems. They understand the basic theoretical models and principles of functionality of transistors, gates, circuits, and conductors. They are able to design simple circuits and evaluate circuit parameters. They understand the differences between analog and digital modes of electronic devices.

Requirements:

High-School level of mathematics and physics.

Syllabus of lectures:

1. Voltage, current, voltage and current sources. Ideal conductor.

2. Idealized elements (resistor, capacitor, inductor) and their parameters (resistance, capacity, inductance). Circuit equations. Node voltage method. Numerical mathematics for solving equations that describe electric circuits.

3. Serial and parallel connection of equivalent elements. RC element. Power. DC circuits.

4. Digital abstraction, Boolean logic, Boolean functions (negation, NAND, NOR, AND, OR, sum-of-products), N-type and P-type switches, implementing logic gates using N-type and P-type switches.

5. Semiconductors, properties. Basic nonlinear elements in electric circuits (diodes, ...), characteristics, linearization. MOSFET. MOSFET as an amplifier. MOSFET as a switch.

6. Structures of logic elements (CMOS technology, physical structure, logic gates, multiplexors, tri-state drivers, level flip-flops, edge flip-flops). Energy and power in digital systems.

7. Sinusoidal steady state with a single frequency. Phasors, impedance, transfer, decibels.

8. Power. Mean and RMS value.

9. Fourier series.

10. Resonant circuits; time diagrams of variables including powers. Measurements, example of tuning.

11. Homogeneous transmission line (approaches, basic termination methods, etc.). Signal delay in digital systems. Symmetric and asymmetric transmission lines.

12. Magnetically coupled circuits. Transformers.

13. Operational amplifiers, comparators (properties, simple op-amp circuit, input and output impedance, examples, RC circuits with op-amps, saturated op-amp, positive feedback).

Syllabus of tutorials:

1. Introduction to SW Mathematica, solving of various types of equations.

2. Introduction to SW Mathematica.

3. TEST1. Node voltage method.

4. Node voltage method.

5. Node voltage method.

6. DC circuits. Transistors.

7. TEST2. Introduction of sinusoidal steady state.

8. Single-frequency sinusoidal steady state.

9. Sinusoidal steady state - impedance. transfer function.

10. Sinusoidal steady state - impedance. transfer function, power.

11. TEST3.

12. Assesment.

13. Reserve.

Study Objective:

The aim of the module is to teach the fundamentals of digital and analog circuits, as well as basic methods of analyzing them. Students learn what do computer structures look like at the lowest level. They are introduced to the function of a transistor. They will know why processors generate heat, why is cooling necessary, and how to reduce the consumption; what are the limits to the maximum operating frequency and how to raise them; why does a computer bus need to be terminated, what happens if it is not; what does (in principle) a computer power supply look like. In the labs, students will perform measurements on actual circuits. They will also design circuits and verify some of their designs hans-on. Mathematica software is used to solve problems.

Study materials:
Note:
Further information:
https://courses.fit.cvut.cz/BI-CAO/
Time-table for winter semester 2018/2019:
06:00–08:0008:00–10:0010:00–12:0012:00–14:0014:00–16:0016:00–18:0018:00–20:0020:00–22:0022:00–24:00
Mon
roomTK:PU1
Jeřábek S.
Chládek O.

11:00–12:30
(parallel nr.206)
Dejvice
NTK PU 1
roomT9:105
Novotný M.
Kohlík M.

16:15–17:45
(lecture parallel1)
Dejvice
Posluchárna
roomT9:105
Novotný M.
Kohlík M.

18:00–19:30
(lecture parallel2)
Dejvice
Posluchárna
roomTK:PU1
Hülle R.
Chládek O.

12:45–14:15
(parallel nr.207)
Dejvice
NTK PU 1
roomT9:107
Novotný M.
Kohlík M.

16:15–17:45
(lecture parallel3)
Dejvice
Posluchárna
roomTK:PU1
Štěpánek F.
Igerský D.

18:00–19:30
(parallel nr.303)
Dejvice
NTK PU 1
roomTK:PU1
Jeřábek S.
Igerský D.

16:15–17:45
(parallel nr.302)
Dejvice
NTK PU 1
Tue
roomTK:PU1
Borecký J.
Mikušík J.

09:15–10:45
(parallel nr.101)
Dejvice
NTK PU 1
roomTK:PU1
Borecký J.
Mikušík J.

11:00–12:30
(parallel nr.102)
Dejvice
NTK PU 1
roomTK:PU1
Kubalík P.
Branda Š.

12:45–14:15
(parallel nr.103)
Dejvice
NTK PU 1
roomTK:PU1
Miškovský V.
Socha P.

14:30–16:00
(parallel nr.104)
Dejvice
NTK PU 1
roomTK:PU1
Kubalík P.
Vančura D.

16:15–17:45
(parallel nr.105)
Dejvice
NTK PU 1
roomTK:PU1
Kubalík P.
Pail V.

18:00–19:30
(parallel nr.106)
Dejvice
NTK PU 1
Fri
roomTK:PU1
Miškovský V.
Socha P.

09:15–10:45
(parallel nr.204)
Dejvice
NTK PU 1
roomTK:PU1
Miškovský V.
Socha P.

11:00–12:30
(parallel nr.205)
Dejvice
NTK PU 1
Thu
Fri
roomTK:PU1
Daňhel M.
Řezníček J.

09:15–10:45
(parallel nr.107)
Dejvice
NTK PU 1
roomTK:PU1
Daňhel M.
Řezníček J.

11:00–12:30
(parallel nr.201)
Dejvice
NTK PU 1
roomTK:PU1
Daňhel M.
Řezníček J.

12:45–14:15
(parallel nr.202)
Dejvice
NTK PU 1
roomTK:PU1
Daňhel M.
Řezníček J.

14:30–16:00
(parallel nr.203)
Dejvice
NTK PU 1
Time-table for summer semester 2018/2019:
Time-table is not available yet
The course is a part of the following study plans:
Data valid to 2019-05-23
For updated information see http://bilakniha.cvut.cz/en/predmet1110806.html