Logo ČVUT
CZECH TECHNICAL UNIVERSITY IN PRAGUE
STUDY PLANS
2019/2020

Digital and Analog Circuits

Login to KOS for course enrollment Display time-table
Code Completion Credits Range Language
BI-CAO Z,ZK 5 2P+2C Czech
Lecturer:
Martin Kohlík, Martin Novotný (guarantor), Jan Řezníček
Tutor:
Martin Kohlík, Martin Novotný (guarantor), Jaroslav Borecký, Šimon Branda, Robert Hülle, Miroslav Kallus, Pavel Kubalík, Vojtěch Miškovský, Jan Onderka, Vojtěch Pail, Jan Řezníček, Jan Říha, Petr Socha
Supervisor:
Department of Digital Design
Synopsis:

Students get the fundamental understanding of technologies underlying electronic digital systems. They understand the basic theoretical models and principles of functionality of transistors, gates, circuits, and conductors. They are able to design simple circuits and evaluate circuit parameters. They understand the differences between analog and digital modes of electronic devices.

Requirements:

High-School level of mathematics and physics.

Syllabus of lectures:

1. Introduction. Voltage, current. Voltage and current sources. Ideal conductor.

2. Resistor, capacitor, inductor. Introduction to Node voltage method.

3. Node voltage method. DC circuits.

4. RC element. Serial and parallel connection of equivalent elements. Voltage divider. Power.

5. Digital circuits.

6. Transistors. Digital circuits.

7. Digital circuits. Introduction to Sinusoidal steady state.

8. Sinusoidal steady state. Phasors, impedance, transfer, decibels.

9. Sinusoidal steady state. Transfer, decibels, power.

9. Resonant circuits. Fourier series.

11. Homogeneous transmission line, reflections. Magnetically coupled circuits. Transformers.

12. Operational amplifiers. Runge-Kutta method.

Syllabus of tutorials:

1. Introduction to SW Mathematica, solving of various types of equations.

2. Introduction to SW Mathematica.

3. TEST1. Node voltage method.

4. Node voltage method.

5. Node voltage method.

6. DC circuits. Transistors.

7. TEST2. Introduction of sinusoidal steady state.

8. Single-frequency sinusoidal steady state.

9. Sinusoidal steady state - impedance. transfer function.

10. Sinusoidal steady state - impedance. transfer function, power.

11. TEST3.

12. Assesment.

13. Reserve.

Study Objective:

The aim of the module is to teach the fundamentals of digital and analog circuits, as well as basic methods of analyzing them. Students learn what do computer structures look like at the lowest level. They are introduced to the function of a transistor. They will know why processors generate heat, why is cooling necessary, and how to reduce the consumption; what are the limits to the maximum operating frequency and how to raise them; why does a computer bus need to be terminated, what happens if it is not; what does (in principle) a computer power supply look like. In the labs, students will perform measurements on actual circuits. They will also design circuits and verify some of their designs hans-on. Mathematica software is used to solve problems.

Study materials:
Note:
Further information:
https://courses.fit.cvut.cz/BI-CAO/
Time-table for winter semester 2019/2020:
06:00–08:0008:00–10:0010:00–12:0012:00–14:0014:00–16:0016:00–18:0018:00–20:0020:00–22:0022:00–24:00
Mon
roomT9:105
Novotný M.
Řezníček J.

16:15–17:45
(lecture parallel1)
Dejvice
Posluchárna
roomTK:PU1
Hülle R.
Branda Š.

18:00–19:30
(parallel nr.2)
Dejvice
NTK PU 1
roomT9:107
Novotný M.
Řezníček J.

16:15–17:45
(lecture parallel3)
Dejvice
Posluchárna
roomT9:105
Novotný M.
Řezníček J.

18:00–19:30
(lecture parallel2)
Dejvice
Posluchárna
Tue
roomTK:PU1
Kubalík P.
Miškovský V.

09:15–10:45
(parallel nr.3)
Dejvice
NTK PU 1
roomTK:PU1
Kubalík P.
Miškovský V.

11:00–12:30
(parallel nr.4)
Dejvice
NTK PU 1
roomTK:PU1
Miškovský V.
Socha P.

12:45–14:15
(parallel nr.5)
Dejvice
NTK PU 1
roomTK:PU1
Socha P.
Onderka J.

14:30–16:00
(parallel nr.6)
Dejvice
NTK PU 1
roomTK:PU1
Socha P.
Pail V.

16:15–17:45
(parallel nr.7)
Dejvice
NTK PU 1
Fri
Thu
roomTK:PU1
Miškovský V.
Kohlík M.

09:15–10:45
(parallel nr.8)
Dejvice
NTK PU 1
roomTK:PU1
Miškovský V.
Kallus M.

12:45–14:15
(parallel nr.10)
Dejvice
NTK PU 1
roomTK:PU1
Borecký J.
Hülle R.

16:15–17:45
(parallel nr.12)
Dejvice
NTK PU 1
roomTK:PU1
Hülle R.
Pail V.

18:00–19:30
(parallel nr.13)
Dejvice
NTK PU 1
roomTK:PU1
Kohlík M.
Miškovský V.

11:00–12:30
(parallel nr.9)
Dejvice
NTK PU 1
roomTK:PU1
Borecký J.
Kallus M.

14:30–16:00
(parallel nr.11)
Dejvice
NTK PU 1
Fri
roomTK:PU1
Řezníček J.
Říha J.

09:15–10:45
(parallel nr.14)
Dejvice
NTK PU 1
roomTK:PU1
Říha J.
Řezníček J.

11:00–12:30
(parallel nr.15)
Dejvice
NTK PU 1
roomTK:PU1
Kohlík M.
Hülle R.

12:45–14:15
(parallel nr.16)
Dejvice
NTK PU 1
roomTK:PU1
Hülle R.
Kohlík M.

14:30–16:00
(parallel nr.17)
Dejvice
NTK PU 1
Time-table for summer semester 2019/2020:
Time-table is not available yet
The course is a part of the following study plans:
Data valid to 2020-07-12
For updated information see http://bilakniha.cvut.cz/en/predmet1110806.html