Digital and Analog Circuits

Lecturer:

Martin Kohlík, Martin Novotný (guarantor), Jan Řezníček

Tutor:

Martin Kohlík, Martin Novotný (guarantor), Jaroslav Borecký, Šimon Branda, Martin Daňhel, Tomáš Heger, Robert Hülle, Miroslav Kallus, Pavel Kubalík, Vojtěch Maršál, Vojtěch Miškovský, Jan Onderka, Vojtěch Pail, Jan Řezníček, Jan Říha, Petr Socha

Supervisor:

Department of Digital Design

Synopsis:

Students get the fundamental understanding of technologies underlying electronic digital systems. They understand the basic theoretical models and principles of functionality of transistors, gates, circuits, and conductors. They are able to design simple circuits and evaluate circuit parameters. They understand the differences between analog and digital modes of electronic devices.

Requirements:

High-School level of mathematics and physics.

Syllabus of lectures:

1. Introduction. Voltage, current. Voltage and current sources. Ideal conductor.

2. Resistor, capacitor, inductor. Introduction to Node voltage method.

3. Node voltage method. DC circuits.

4. RC element. Serial and parallel connection of equivalent elements. Voltage divider. Power.

5. Digital circuits.

6. Transistors. Digital circuits.

7. Digital circuits. Introduction to Sinusoidal steady state.

8. Sinusoidal steady state. Phasors, impedance, transfer, decibels.

9. Sinusoidal steady state. Transfer, decibels, power.

9. Resonant circuits. Fourier series.

11. Homogeneous transmission line, reflections. Magnetically coupled circuits. Transformers.

12. Operational amplifiers. Runge-Kutta method.

Syllabus of tutorials:

1. Introduction to SW Mathematica, solving of various types of equations.

2. Introduction to SW Mathematica.

3. TEST1. Node voltage method.

4. Node voltage method.

5. Node voltage method.

6. DC circuits. Transistors.

7. TEST2. Introduction of sinusoidal steady state.

8. Single-frequency sinusoidal steady state.

9. Sinusoidal steady state - impedance. transfer function.

10. Sinusoidal steady state - impedance. transfer function, power.

11. TEST3.

12. Assesment.

13. Reserve.

Study Objective:

The aim of the module is to teach the fundamentals of digital and analog circuits, as well as basic methods of analyzing them. Students learn what do computer structures look like at the lowest level. They are introduced to the function of a transistor. They will know why processors generate heat, why is cooling necessary, and how to reduce the consumption; what are the limits to the maximum operating frequency and how to raise them; why does a computer bus need to be terminated, what happens if it is not; what does (in principle) a computer power supply look like. In the labs, students will perform measurements on actual circuits. They will also design circuits and verify some of their designs hans-on. Mathematica software is used to solve problems.

Study materials:

Note:

Further information:

https://courses.fit.cvut.cz/BI-CAO/

Time-table for winter semester 2020/2021:

	06:00–08:0008:00–10:0010:00–12:0012:00–14:0014:00–16:0016:00–18:0018:00–20:0020:00–22:0022:00–24:00
Mon	roomT9:105 Novotný M. Řezníček J. 16:15–17:45 (lecture parallel1) Dejvice PosluchárnaroomTK:PU1 Kohlík M. 18:00–19:30 (parallel nr.1) Dejvice NTK PU 1 roomT9:107 Novotný M. Řezníček J. 16:15–17:45 (lecture parallel3) Dejvice PosluchárnaroomT9:105 Novotný M. Řezníček J. 18:00–19:30 (lecture parallel2) Dejvice Posluchárna
Tue	roomTK:PU1 Miškovský V. Maršál V. 09:15–10:45 (parallel nr.2) Dejvice NTK PU 1roomTK:PU1 Miškovský V. Kallus M. 12:45–14:15 (parallel nr.4) Dejvice NTK PU 1roomTK:PU1 Borecký J. Onderka J. 14:30–16:00 (parallel nr.5) Dejvice NTK PU 1roomTK:PU1 Borecký J. Pail V. 16:15–17:45 (parallel nr.6) Dejvice NTK PU 1 roomTK:PU1 Miškovský V. Kallus M. 11:00–12:30 (parallel nr.3) Dejvice NTK PU 1
Fri
Thu	roomTK:PU1 Kubalík P. Daňhel M. 09:15–10:45 (parallel nr.7) Dejvice NTK PU 1roomTK:PU1 Daňhel M. Kubalík P. 11:00–12:30 (parallel nr.8) Dejvice NTK PU 1roomTK:PU1 Kubalík P. Kohlík M. 12:45–14:15 (parallel nr.9) Dejvice NTK PU 1roomTK:PU1 Kohlík M. Hülle R. 14:30–16:00 (parallel nr.10) Dejvice NTK PU 1roomTK:PU1 Hülle R. Kohlík M. 16:15–17:45 (parallel nr.11) Dejvice NTK PU 1roomTK:PU1 Pail V. Heger T. 18:00–19:30 (parallel nr.12) Dejvice NTK PU 1
Fri	roomTK:PU1 Kohlík M. Řezníček J. 09:15–10:45 (parallel nr.13) Dejvice NTK PU 1roomTK:PU1 Řezníček J. Kohlík M. 11:00–12:30 (parallel nr.14) Dejvice NTK PU 1roomTK:PU1 Kohlík M. Daňhel M. 12:45–14:15 (parallel nr.15) Dejvice NTK PU 1roomTK:PU1 Daňhel M. Hülle R. 14:30–16:00 (parallel nr.16) Dejvice NTK PU 1roomTK:PU1 Hülle R. Daňhel M. 16:15–17:45 (parallel nr.17) Dejvice NTK PU 1

Time-table for summer semester 2020/2021:

Time-table is not available yet

The course is a part of the following study plans:

• Bc. Programme Informatics, in Czech, Version 2015 to 2020 (compulsory course in the program)
• Bc. Branch Security and Information Technology, in Czech, Version 2015 to 2020 (compulsory course in the program)
• Bc. Branch Computer Science, in Czech, Version 2015 to 2020 (compulsory course in the program)
• Bc. Branch Computer Engineering, in Czech, Version 2015 to 2020 (compulsory course in the program)
• Bachelor Branch Information Systems and Management, in Czech, Version 2015 to 2020 (compulsory course in the program)
• Bachelor Branch Knowledge Engineering, in Czech, Version 2015, 2016 and 2017 (compulsory course in the program)
• Bachelor Branch WSI, Specialization Software Engineering, in Czech, Version 2015 to 2020 (compulsory course in the program)
• Bachelor Branch, Specialization Web Engineering, in Czech, Version 2015 to 2020 (compulsory course in the program)
• Bachelor Branch WSI, Specialization Computer Grafics, in Czech, Version 2015 to 2020 (compulsory course in the program)
• Bachelor Branch Knowledge Engineering, in Czech, Version 2018 to 2020 (compulsory course in the program)