Logo ČVUT
CZECH TECHNICAL UNIVERSITY IN PRAGUE
STUDY PLANS
2024/2025

Computer Hardware

The course is not on the list Without time-table
Code Completion Credits Range Language
614Y1HW KZ 2 2P+0C Czech
Garant předmětu:
Lecturer:
Tutor:
Supervisor:
Department Děčín
Synopsis:

Computer architecture, basics of logical circuits design and their realization using FPGA. In detail, description of computer architecture and separate parts designing - controllers, arithmetic and logical units, I/O subsystem.

Requirements:

Basics of programming, System analysys

Syllabus of lectures:
Syllabus of tutorials:
Study Objective:

Knowledge acquisition concerning computer architecture, basics of logical circuits design using classical components and FPGA (Field Programmable Gate Array)

Study materials:

Fábera: Úvod do hardware počítačů, skriptum ČVUT FD, 2005

Douša, Jáneš: Logické systémy, Praha, skriptum ČVUT, 1998

Pluháček: Návrh logiky počítačů, Praha, skriptum ČVUT, 1999

Pinker, Poupa: Číslicové systémy a jazyk VHDL, BEN, 2006

Král: Řešené příklady ve VHDL, BEN, 2010

Katz: Contemporary Logic Design, The Benjamin/Cummings Publishing Company

Note:
Further information:
No time-table has been prepared for this course
The course is a part of the following study plans:
Data valid to 2024-06-16
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