Seminars on Digital Design

Course guarantor:

Lecturer:

Tutor:

Supervisor:

Department of Digital Design

Synopsis:

This subject deals with problems of realization and implementation of digital circuits - both combinational and sequential. Basic means of description of digital circuits and basic logic synthesis and optimization algorithms are described. Basics of EDA (Electronic Design Automation) systems are given, together with combinatorial problems emerging in EDA.

Requirements:

Digital system design master courses knowledge.

Syllabus of lectures:

1. Representations of logic functions

2. Binary decision diagrams (BDDs), structures derived from

3. Other representations of logic functions and digital circuits

4. Two-level minimization

5. Multi-level logic synthesis, decomposition - algebraic methods

6. Multi-level logic synthesis, decomposition - Boolean methods

7. Exploiting don't cares in multi-level logic synthesis and optimization

8. Sequential circuits synthesis. Automata theory. Decomposition, automata realization. Sequential circuits optimization

9. Asynchronous circuits

10. Technology mapping, timing models

11. Contemporary synthesis - ABC

12. Combinatorial problems in EDA systems

Syllabus of tutorials:

1. Binary decision diagrams (BDDs)

2. Two-level functions descriptions. PLA. Espresso and other two-level minimizers

3. Multi-level functions descriptions. Blif. Logic synthesis and optimization tool SIS

4. Logic synthesis and optimization tool ABC

5. SAT problem, solvers. Circuit-SAT conversion

6. Equivalence checking

Study Objective:

This subject will extend practical and theoretical skills obtained from „PCS“ and „NPVS“ master courses by recent and new trends in digital design field of research and practice.

Study materials:

G. D. Hachtel, F. Somenzi: „Logic Synthesis and Verification Algorithms“, Kluwer Academic Pub, 1996, 564 p.

S. Hassoun, T. Sasao, „Logic Synthesis and Verification“, Boston, MA, Kluwer Academic Publishers, 2002, 454 p.

Proceedings of conferences of digital design, e.g. DAC, DATE, DDECS, DSD, ISWBP, etc.

Note:

Information about the course and courseware are available athttps://moodle-vyuka.cvut.cz/course/view.php?id=5040

Further information:

https://moodle-vyuka.cvut.cz/course/view.php?id=5040

No time-table has been prepared for this course

The course is a part of the following study plans:

• Informatics (doctoral) (compulsory elective course)
• Informatics (compulsory elective course)
• Master specialization Computer Security, in Czech, 2020 (elective course)
• Master specialization Design and Programming of Embedded Systems, in Czech, 2020 (elective course)
• Master specialization Computer Systems and Networks, in Czech, 202 (elective course)
• Master specialization Management Informatics, in Czech, 2020 (elective course)
• Master specialization Software Engineering, in Czech, 2020 (elective course)
• Master specialization System Programming, in Czech, version from 2020 (elective course)
• Master specialization Web Engineering, in Czech, 2020 (elective course)
• Master specialization Knowledge Engineering, in Czech, 2020 (elective course)
• Master specialization Computer Science, in Czech, 2020 (elective course)
• Mgr. programme, for the phase of study without specialisation, ver. for 2020 and higher (elective course)
• Study plan for Ukrainian refugees (elective course)
• Master specialization System Programming, in Czech, version from 2023 (elective course)
• Master specialization Computer Science, in Czech, 2023 (elective course)