FPGA Applications
| Kód | Zakončení | Kredity | Rozsah | Jazyk výuky |
|---|---|---|---|---|
| AE0B38APH | KZ | 5 | 1P+3L | anglicky |
- Garant předmětu:
- Radek Sedláček
- Přednášející:
- Radek Sedláček
- Cvičící:
- Radek Sedláček
- Předmět zajišťuje:
- katedra měření
- Anotace:
-
After the short introduction into the structure and technology of programmable circuits (especially the CPLD and FPGA), the lectures are devoted to the VHDL and its usage for simulation and synthesis of digital circuits. Laboratories are focused on CPLD and FPGA circuit applications and on the use of SW instruments for programmable hardware design and simulation. Within the larger project implemented in the second part of laboratories, a complete device (system on the chip) is implemented in the FPGA or CPLD circuit. Students may choose from the list of projects or they can bring their own (even group projects are possible). Development boards with FPGA (or CPLD) are available.
The result of the student survey of the course is here: http://www.fel.cvut.cz/anketa/aktualni/courses/AE0B38APH
- Požadavky:
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Basic knowledge of Boolean algebra, basic logic circuits, and programming in the C language
- Osnova přednášek:
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1. Programmable circuits, history, and present.
2. Introduction to VHDL, design units.
3. Numbers, characters, strings.
4. Basic data types and operators.
5. Basic objects - constants, variables, signals.
6. Parallel and sequential domains.
7. Implementation of state automata.
8. Standard libraries, LPM library.
9. Procedures and functions.
10.Design of combinatorial and sequential circuits.
11.Instruments and methods for simulation.
12.Special internal structures (RAM, PLL, multipliers) and their usage.
13.Implementation of user libraries.
14.Implementation of microprogrammed automata.
- Osnova cvičení:
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1. Introduction in QUARTUS II, opening project
2. Logic and arithmetic functions in VHDL, programming in the parallel domain.
3. Programming in the sequential domain - processes, flip-flops, and counters.
4. Design simulation using test vectors and test benches in ModelSim.
5. State automata - variants of VHDL implementation.
6. Usage of internal RAM in projects.
7. Usage of external RAM in projects.
8. Desing of SoC based on NIOS II - example I.
9. Desing of SoC based on NIOS II - example II.
10.Work on project implementation.
11.Work on project implementation.
12.Work on project implementation.
13.Work on project implementation.
14.Final project presentation, assessment.
- Cíle studia:
-
The aim of the study is to teach students to understand FPGA circuits from the point of view of their internal structure. Students will learn to program FPGA in VHDL and gain basic knowledge about the design of the so-called system on a chip (SoC). They will also get acquainted with the typical possibilities of using FPGA circuits in practice.
- Studijní materiály:
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1. Pedroni, V.A.: Digital Electronics and Design with VHDL. Morgan Kaufmann 2008, ISBN: 978-0123742704
2. Ashenden, P. J.: The Designer's guide to VHDL. Morgan Kaufmann 2008. ISBN: 978-0-12-088785-9.
- Poznámka:
- Další informace:
- https://moodle.fel.cvut.cz/courses/AE0B38APH
- Rozvrh na zimní semestr 2024/2025:
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06:00–08:0008:00–10:0010:00–12:0012:00–14:0014:00–16:0016:00–18:0018:00–20:0020:00–22:0022:00–24:00
Po Út St Čt Pá - Rozvrh na letní semestr 2024/2025:
- Rozvrh není připraven
- Předmět je součástí následujících studijních plánů: