Digital Engineering

Lecturer:

Jiří Sýkora (gar.), Jan Bičák

Tutor:

Petr Hampl, Jiří Sýkora (gar.), Jan Bičák, Petr Skalický

Supervisor:

Department of Telecommunications Engineering

Synopsis:

The aim of the course is to familirize students with the principles of both classical and programmable logic devices and their practical use in the design of digital systems.

Teaching digital circuits will be based on the classical description of logic gate use and a description of the VHDL language. In the context of the seminars, students will work with real logic gates, measure their static and dynamic properties. They will verify the function of digital circuits in the simulator and will implement them in the programmable gate array. The seminar will conclude with a project, in which students will explore the design and testing of a simple digital system using the programmable gate array.

Requirements:

Basics of electrical circuits and basics of algorithmisation.

Syllabus of lectures:

1.Digital circuits, basic concepts, information, number systems, codes

2.Combinational logic circuits - Boolean algebra, logic expressions, truth table, minimization, maps, design of combinational logic

3.VHDL language

4.Transients in combinational logic circuits - delay of signals, hazard states, means of hazard elimination

5.The basic functional blocks - decoder, multiplexer, demultiplexer, priority encoder, digital comparator, adder, subtractor, code converter

6.Asynchronous and Synchronous flip-flops, SR, T, D, JK, transformation of flip-flops, blocking

7.Registers and counters - data registers, shift registers, counters characteristics, asynchronous and synchronous counters, reseting, setting

8.Sequential logic circuits - transient and output functions, various forms of description finite state machine

9.Memory devices - terminology, parameters, serial and parallel memory, internal arrangement, the use of memory in combinational circuits

10.Programmable logic devices (PLD, CPLD)

11.Programmable gate arrays (PGA, FPGA)

12.Microprogram machine, microprocessor system and its use for the implementation of logic functions

13.Design of digital systems

14.Verification of digital systems

Syllabus of tutorials:

1.Introduction, basic calculations in number systems with various bases, introduction to laboratory tasks

2.Work with basic gates, measurement of static and dynamic characteristics

3.Minimization of logic functions, realization of logic functions with logic gates

4.Introduction to the development enviroment, simulator, VHDL

5.Combinatorial circuit realization - decoder, multiplexor, adder

6.Realization of R-S, D, T, JK Flip-flop circuits

7.Integration of basic blocks

8.Sequencional circuit realization - couters, shift registers

9.Introduction to the development kit and measurement station by solving a practical task

10.Project realization - 1. part, reasult check

11.Project realization - 2. part, reasult check

12.Project realization - 3. part, reasult check

13.Project realization - 4. part, entire project checkup

14.Project report hand in, assesment

Study Objective:

Study materials:

[1]Brown, S. - Vranesic, Z. Fundamentals of Digital Logic with VHDL Design with CD-ROM. 2 ed., McGraw-Hill, 2004, 939 p., ISBN 07-249938-9

[2]Xilinx [online]. 2008 [cit. 2008-05-27]. <http://www.xilinx.com/>

Note:

Time-table for winter semester 2011/2012:

	06:00–08:0008:00–10:0010:00–12:0012:00–14:0014:00–16:0016:00–18:0018:00–20:0020:00–22:0022:00–24:00
Mon
Tue	roomT2:C3-337 Sýkora J. Bičák J. 12:45–14:15 (lecture parallel1) Dejvice Posluchárna
Fri	roomT2:B3-812a Hampl P. Skalický P. 12:45–14:15 (lecture parallel1 parallel nr.101) Dejvice Laboratoř K332
Thu
Fri

Time-table for summer semester 2011/2012:

Time-table is not available yet

The course is a part of the following study plans: