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CZECH TECHNICAL UNIVERSITY IN PRAGUE
STUDY PLANS
2011/2012

Digital Control of Telecommunications Systems

The course is not on the list Without time-table
Code Completion Credits Range Language
XE32CRT Z,ZK 3 2+1s
The course is a substitute for:
Digital Control of Telecommunications Systems (X32CRT)
Lecturer:
Tutor:
Supervisor:
Department of Telecommunications Engineering
Synopsis:

Subject CRT deals with basic principles of digital logic circuit solutions used in control of digital telecommunications systems. Uses basic view of sequential logic circuit, focuses at its synthesis, clarifies individual steps of synthesis. Deals also with properties and process of synthesis of special sequential circuits, i.e. receivers of ac code, memory elements, counters, registers, shift registers and microprogammable machines and their synthesis.

Requirements:

1. Students are required to go through and pass out all of given laboratory

exercises.

2. Students have to present a report from laboratory execisers in a writen form to the lecturer.

3. Students have to go through apologized mising laboratory exercises .

Syllabus of lectures:

1.Introduction to digital system design

2.Sequential Circuit Design

3.Analysis of clocked Sequential circuits, state tables, state assignment

4.Hardware description languages, VHDL

5.Synthesis of VHDL, modeling

6.Basic memory elements, principle, application

7.Complex programmable logic devices (CPLDs) and Field-programmable gate array (FPGA)

8.Counters and registers for telecommunications

9.Phase-locked loop (PLL), principle, and application

10.State machine design with SM charts

11.Microprocessors for telecommunications

12.Adders, Dividers, Multipliers

13.IC Interconnection standards for telecommunications

14.New trends in design, System on chip (SoC), System in package (SiP

Syllabus of tutorials:

1. Use of SLC in telecom. system control. Example of applications

2. CMOS 4000 circuits, presentation of applications

3. Phase lagging MHB4046, plan and realisation

4. Code transferors, parity generators, visual elements

5. Minimalisation of number of inner states - synchronous SLC

6. Minimalisation of number of inner states - asynchronous SLC

7. Examples of SLC planning - type Mealy and Moore

8. Realisation SLC - type Mealy and Moore

9. Synchronous and asynchronous timers, shift registers, realisation by MH 74 circuits

10. Semiconductor memories, properties, use

11. A/D, D/A converters , application of MDAC08

12. Solution of A/D, D/A converters using microprocessors

13. Planning of micro-programmable machines

14. Realisation of micro-programmable machines

Study Objective:
Study materials:

1. Pettit, J., M., Mc Whorter, M., M.: Elektronic Switching, Timing,and Pulse Circuits. New York, San Francisco, London, Sydney, Toronto: Mc Graw - Hill Book Company, 1974.

2. Givone, D., D.: Introduction to Switching Circuit Theory. New York, San Francisco, Düsseldorf, London, Sydney, Toronto: Mc Graw - Hill Book Company, 1972.

Note:
Further information:
No time-table has been prepared for this course
The course is a part of the following study plans:
Generated on 2012-7-9
For updated information see http://bilakniha.cvut.cz/en/predmet11861504.html