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CZECH TECHNICAL UNIVERSITY IN PRAGUE
STUDY PLANS
2011/2012

Advaced Computer Architecture

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Code Completion Credits Range
XP36VAP ZK 4 2+2s
Lecturer:
Tutor:
Supervisor:
Department of Computer Science and Engineering
Synopsis:

Instruction level parallelism (pipelined, superpipelined and superscalar systems). Basic limitations to parallelism (structural, data and control hazards). Instruction fetch and execution methods (in order, out of order). Register data flow, software and hardware solutions, interlocking, scoreboard, control stack. Memory reuse, register renaming. Modern RISC processors. Parallel systems, performace evaluation, HPCC, supercomputers. Shared memory multiprocessors (bus, switch, switched memory). Interconnection structures. Cache coherence mechanisms for multiprocessor systems. MIMD systems UMA, NUMA, COMA. Distributed memory multiprocessors (crossbar switch). Data flow systems, multithreading. Accelerators, special architectures.

Requirements:
Syllabus of lectures:
Syllabus of tutorials:
Study Objective:
Study materials:

J.L.Hennessy, D.A.Patterson. Computer Architecture: A Quantitative Approach. The Morgan Kaufmann,3rd Edition, 1990, ISBN 1-55860-724-2.

J.Shen and M.Lipasti. Modern Processor Design: Fundamentals of Superscalar Processors, McGraw Hill 2005, ISBN 0-07-057064-7.

Note:
Time-table for winter semester 2011/2012:
Time-table is not available yet
Time-table for summer semester 2011/2012:
Time-table is not available yet
The course is a part of the following study plans:
Generated on 2012-7-9
For updated information see http://bilakniha.cvut.cz/en/predmet11847304.html