Logical Simulation

Lecturer:

Neurčen (gar.)

Tutor:

Neurčen (gar.)

Supervisor:

Department of Computer Science and Engineering

Synopsis:

General introduction to simulation: fundamental ideas and principles of simulation systems, synchronous and asynchronous simulation. Simulation system VHDL and its use for simulation of digital circuits: data types, entities, architectures, sequential environment (processes, functions, procedures), signals and their attributes, resolution function, parallel environment (data-flow description, blocks, structural description), configuration of structural models.

Students who completed course 36SIM cannot enroll.

Requirements:

Syllabus of lectures:

Syllabus of tutorials:

Study Objective:

Study materials:

1. Cohen Ben: VHDL Coding Styles and Methodologies, Springer 1999

2. Zwolinski Mark: Digital System Design with VHDL, Prentice Hall 2003

Note:

Time-table for winter semester 2011/2012:

Time-table is not available yet

Time-table for summer semester 2011/2012:

Time-table is not available yet

The course is a part of the following study plans:

• Doctoral studies, daily studies (compulsory elective course)
• Doctoral studies, combined studies (compulsory elective course)
• Doctoral studies, structured daily studies (compulsory elective course)
• Doctoral studies, structured combined studies (compulsory elective course)