Programmable Logic Circuits 1
Code | Completion | Credits | Range | Language |
---|---|---|---|---|
XE31PO1 | Z,ZK | 4 | 2+2s |
- The course is a substitute for:
- Programmable Logic Circuits 1 (X31PO1)
- Lecturer:
- Tutor:
- Supervisor:
- Department of Circuit Theory
- Synopsis:
-
Programmable Logic Circuits 1 explains the architecture, function and using of simple programmable logic devices. Students have a chance to use different design systems and try some design results not only with simulator, but on hardware kits, too. These kits are available for Lattice GAL, ispLSI and Xilinx FPGA devices.
- Requirements:
- Syllabus of lectures:
-
1. Introduction, GA, ASIC, PLD architectures
2. Design flow, design systems for PLD
3. User programmable logic devices - PLD, FPGA
4. Architecture and using of PLD circuits
5. Function description of PLD
6. HDL languages, PLD design and verification
7. Architecture of CPLD Lattice and Altera
8. Architecture of CPLD Atmel, Xilinx
9. Architecture and application of FPGA XILINX
10. Architecture and application of advanced XILINX FPGAs
11. Architecture and application of FPGA Actel
12. Programming of devices, programmers, algorithms
13. Package options, devices with large pin number, high power loss
14. New PLD and FPGA architectures
- Syllabus of tutorials:
-
1. Introduction, PLD architecture
2. Design flow, design systems examples, exercise
3. PLD design flow, design systems
4. Individual work with design systems for PLD and CPLD
5. Individual work with design systems for PLD and CPLD
6. Individual work with design systems and test equipment for PLD and CPLD
7. Individual work with design systems and test equipment for PLD and CPLD
8. Individual work with design systems and test equipment for PLD and CPLD
9. Using of FPGA XILINX, design system introduction
10. Individual work with design systems for FPGA XILINX
11. Individual work with design systems for FPGA XILINX
12. Individual work with design systems for FPGA XILINX
13. Individual work with design systems for FPGA XILINX
14. New PLD and FPGA architectures and design systems
- Study Objective:
- Study materials:
-
1. Databooks AMD, Philips, Lattice, Xilinx, Actel
2. Web support
- Note:
- Further information:
- No time-table has been prepared for this course
- The course is a part of the following study plans:
-
- Computer Science and Engineering (elective course)