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CZECH TECHNICAL UNIVERSITY IN PRAGUE
STUDY PLANS
2011/2012

Implementation of DSP Algorithms in Telecommunications

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Code Completion Credits Range Language
XP32IAT ZK 4 2+0s Czech
Lecturer:
Pavel Zahradník (gar.)
Tutor:
Pavel Zahradník (gar.)
Supervisor:
Department of Telecommunications Engineering
Synopsis:

The course makes the students familiar with the implementation of DSP algorithms used in telecommunication technology using digital signal processors. The platform DSP TMS320C6x is assumed.

Requirements:

Digital signal processing in span of AE2M32VAD - Applications Development and DSP.

Syllabus of lectures:

Digital signal processors series TMS320C6x. VLIW architecture VelocitTI.2. Functional blocks, CPU, registers, EDMA channels, EMIF, on-chip memories, cache, timers, McBSP. Development tools, Code Composer studio. Instruction set. Cooperation of CPU and EDMA, interrupts. Implementation of algorithms, FFT, DFT, DTMF, convolution,

correlation, motion detection, compression. Language C, intrinsics, code optimization,

linear assembler, assembler.

Syllabus of tutorials:
Study Objective:

Students learn to implement selected algorithms using digital signal processors.

Study materials:

1. www.ti.com

2. N. Dahnoun : Digital Signal Processing Implementation

using the TMS320C6000 DSP Platform. Prentice Hall 2000.

3. Chassaing, R. - Reay, D.: Digital Signal Processing and Applications with the TMS320C6713 and TMS320C6416 DSK (Topics in Digital Signal Processing), Wiley-IEEE 2008.

4. Moodle system

Note:
Time-table for winter semester 2011/2012:
Time-table is not available yet
Time-table for summer semester 2011/2012:
06:00–08:0008:00–10:0010:00–12:0012:00–14:0014:00–16:0016:00–18:0018:00–20:0020:00–22:0022:00–24:00
Mon
Tue
Fri
roomT2:B3-812a
Zahradník P.
11:00–12:30
(lecture parallel1)
Dejvice
Laboratoř K332
Thu
Fri
The course is a part of the following study plans:
Generated on 2012-7-9
For updated information see http://bilakniha.cvut.cz/en/predmet11739104.html