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CZECH TECHNICAL UNIVERSITY IN PRAGUE
STUDY PLANS
2011/2012

Architecture of Computer Systems

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Code Completion Credits Range
XD36APS Z,ZK 5 14+6s
The course is a substitute for:
Computer Architecture (D36APS)
Lecturer:
Jiří Buček
Tutor:
Jiří Buček
Supervisor:
Department of Computer Science and Engineering
Synopsis:

The course builds on the knowledge of individual computer components gained during the preceding courses and presents the computer system as a whole. Its starts with the usual types of architecture of single-processor computers, concentrating on the main features of system architecture like memory hierarchy, use of pipelining and processor types. The second part of the course is devoted to parallel systems, their basic properties, taxonomy and application areas, including the characteristics of the most important representatives.

Requirements:

Students are required to solve semestral project, attend mandatory seminars and labs and pass the exam.

Syllabus of lectures:

1. Computer performance evaluation

2. Architecture of single-processor systems, interconnection structures, examples

3. Hierarchy of memory systems, types of used memories and their role in the system

4. Pipelined processing, its use at the level of system, program and individual operations

5. CISC processors, their development, properties and structure of typical representatives

6. RISC processors, their development, properties and structure of typical representatives

7. Personal computers, workstations, servers

8. Parallel systems, motivation, principles, taxonomy, Amdahl's law

9. Interconnection networks, structure, control and function in parallel systems

10. MIMD systems, types of architecture (NUMA, COMA), structure, application areas

11. Massive parallel systems, their construction, workstation farms

12. SIMD systems with local memory, with shared memory, associative processors

13. Non-traditional architectures: dataflow, systolic systems, neural networks

14. Perspectives of further development of computer systems

Syllabus of tutorials:

1. Computer performance evaluation. Semestral project assignment

2. Properties of instruction sets. Specification of topics

3. Presentation of semestral projects

4. Presentation of semestral projects

5. Presentation of semestral projects

6. Presentation of semestral projects

7. Presentation of semestral projects

8. Test 1. Cache memory - seminar

9. Instruction pipeline

10. Study of DLX computer

11. Simulation of DLX in lab

12. Simulation of DLX in lab

13. Test 2. Reserve

14. Assessment

Study Objective:
Study materials:

1. Hlavicka, J.: Computer Architecture. Prague, CTU Publishing House 1999, 206 pp.

2. Hennessy, J.L. - Patterson, P.A.: Computer Architecture: a Quantitative Approach. Second Edition, San Francisco, Morgan Kaufmann Publishers, Inc., 1996

3. Hwang, K.: Advanced Computer Architecture. McGraw-Hill, 1993, 771 pp.

Note:
Time-table for winter semester 2011/2012:
06:00–08:0008:00–10:0010:00–12:0012:00–14:0014:00–16:0016:00–18:0018:00–20:0020:00–22:0022:00–24:00
Mon
Tue
Fri
Thu
Fri
roomKN:E-127
Buček J.
09:15–10:45
ODD WEEK

(lecture parallel1)
Karlovo nám.
Kotkova cvičebna K4
Time-table for summer semester 2011/2012:
Time-table is not available yet
The course is a part of the following study plans:
Generated on 2012-7-9
For updated information see http://bilakniha.cvut.cz/en/predmet11663204.html