Practical Digital Design

Lecturer:

Martin Novotný (gar.)

Tutor:

Martin Novotný (gar.)

Supervisor:

Department of Digital Design

Synopsis:

Students get an overview of the contemporary digital design flow and learn practical skills to use synchronous design techniques. They understand the basics of the VHDL language, and implementation technologies FPGA and ASIC. Students demonstrate practical use of the design techniques in the module project sing modern, industry-standard CAD design tools.

Requirements:

Basic knowledge of architectures of computers and their units and of digital system design techniques.

Syllabus of lectures:

1. Contemporary digital design flow.

2. Project management, metrics and estimates.

3. Fundamentals of synchronous design.

4. Digital circuits implementation technologies - ASICs, FPGAs.

5. Design at the algorithm level, decomposition to blocks.

6. VHDL language for description of digital circuits.

7. Circuit description on the RT level - registers, counters, multiplexers.

8. Circuit description on the RT level - arithmetics.

9. Circuit description on the RT level - on-chip memories.

10. Synthesis from RT level - the use of constraints.

11. Verification plan, models of verification.

12. Implementation of a testbench.

13. Design for testability.

Syllabus of tutorials:

1. Students will get practical experience in the design of digital circuits using EDA tools for FPGAs. Students will work out a semestral project and accomplish a short visit in a professional design center.

2. Introduction to the subject.

3. [3] Introduction and exercises with FPGA EDA tool.

4. [3] Design and verification of a simple synchronous circuit.

5. [5] Individual work on the semestral project.

6. Visit to a professional digital design center.

7. Presentation of the results.

8. Evaluation.

Study Objective:

The main aim is to obtain practical skills in using modern, industry-standard CAD design tools, that is, to produce synthesizable design in VHDL and implement it in a FPGA.

Study materials:

https://edux.fit.cvut.cz/courses/BI-PNO/

Note:

Further information:

https://edux.fit.cvut.cz/courses/BI-PNO/

Time-table for winter semester 2011/2012:

	06:00–08:0008:00–10:0010:00–12:0012:00–14:0014:00–16:0016:00–18:0018:00–20:0020:00–22:0022:00–24:00
Mon	roomT9:346 Novotný M. 12:45–14:15 (lecture parallel1) Dejvice NBFIT učebnaroomT9:345 Novotný M. 14:30–16:00 (lecture parallel1 parallel nr.101) Dejvice NBFIT HW ucebna
Tue
Fri
Thu
Fri

Time-table for summer semester 2011/2012:

Time-table is not available yet

The course is a part of the following study plans:

• Computer engineering, Version for Students who Enrolled in 2009 and 2010, in Czech (compulsory course of the specialization)
• Information Systems and Management, Version for Students who Enrolled in 2009 and 2010, in Czech (VO)
• Informatics, Version for Students who Enrolled in 2009 and 2010, Presented in Czech (VO)
• Informatics (Bachelor)- Version for those who Enrolled in 2011 and 2012 (in Czech) (VO)
• Information Systems and Management - Version for those who Enrolled in 2011 and 2012 (in Czech) (VO)
• Computer Engineering, Version for those who Enrolled in 2011 and 2012, in Czech (compulsory course of the specialization)