Computer Units
Code | Completion | Credits | Range | Language |
---|---|---|---|---|
BI-JPO | Z,ZK | 5 | 2+2 | Czech |
- Lecturer:
- Alois Pluháček (gar.)
- Tutor:
- Alois Pluháček (gar.), Pavel Kubalík
- Supervisor:
- Department of Digital Design
- Synopsis:
-
Students get knowledge of the internal structure and organisation of computer or processor components and their interfacing with the environment, the organisation of main memory and other internal memories (addressable, LIFO, FIFO, and CAM)and with design methodology for the control unit and controllers, basic principles of communication with peripheral devices and buses.
- Requirements:
-
Basic knowledge of the structure and architecture of a digital computer, design principles for combinational and sequential circuits, binary arithmetic, the concept of computer memory.
- Syllabus of lectures:
-
1. Organization and structure of von Neumann computers.
2. Binary adders, subtractors and shifters.
3. Arithmetic and logic unit of simple processor.
4. Control unit and controllers; microprogrammed control unit.
5. Wired control unit.
6. Binary multiplication and division and their implementation.
7. Basic principles of error detection and correction.
8. Linear and cyclic codes.
9. Main memory - possible organizations and interfaces.
10. Other internal memories, their organization and use - addressable memories, LIFO, FIFO, CAM.
11. I/O units and their control - DMA, channels and I/O processors.
12. Buses - types, modes, arbitration.
13. Floating point representation.
- Syllabus of tutorials:
-
1. Number systems, conversions and operations.
2. Representations of negative numbers.
3. Simple processor - instructions, machine code, data part.
4. Simple processor - instruction cycle, interface.
5. Simple processor - microprogramming.
6. Simple processor - demonstration of a microprogram.
7. Wired controller design I.
8. Wired controller design II.
9. Linear codes.
10. Cyclic codes.
11. Design of a processor component on FPGA.
12. Demonstration of the designed processor component.
13. Spare seminar, assessment.
- Study Objective:
-
This module teaches future computer engineers the way how to design their own processors for a specific purpose, what units must be contained in a processor or a computer, and how these units communicate. Everything is demonstrated in hands-on experiments with FPGA and simulators.
- Study materials:
-
Hennesy, J. L., Patterson, D. A. ''Computer Architecture: A Quantitative Approach, Third Edition''. Morgan Kaufmann, 2002. ISBN 1558605967.
Tanenbaum, A. S. ''Structured Computer Organization (5th Edition)''. Prentice Hall, 2005. ISBN 0131485210.
Stallings, W. ''Computer Organization and Architecture: Designing for Performance (7th Edition)''. Prentice Hall, 2005. ISBN 0131856448.
Hamacher, C., Vranesic, Z., Zaky, S. ''Computer Organization''. McGraw-Hill, 2001. ISBN 0072320869.
- Note:
- Time-table for winter semester 2011/2012:
-
06:00–08:0008:00–10:0010:00–12:0012:00–14:0014:00–16:0016:00–18:0018:00–20:0020:00–22:0022:00–24:00
Mon Tue Fri Thu Fri - Time-table for summer semester 2011/2012:
- Time-table is not available yet
- The course is a part of the following study plans:
-
- Computer engineering, Version for Students who Enrolled in 2009 and 2010, in Czech (compulsory course of the specialization)
- Information Systems and Management, Version for Students who Enrolled in 2009 and 2010, in Czech (VO)
- Informatics, Version for Students who Enrolled in 2009 and 2010, Presented in Czech (VO)
- Informatics (Bachelor)- Version for those who Enrolled in 2011 and 2012 (in Czech) (VO)
- Information Systems and Management - Version for those who Enrolled in 2011 and 2012 (in Czech) (VO)
- Computer Engineering, Version for those who Enrolled in 2011 and 2012, in Czech (compulsory course of the specialization)