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CZECH TECHNICAL UNIVERSITY IN PRAGUE
STUDY PLANS
2011/2012

Digital and Analog Circuits

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Code Completion Credits Range Language
BI-CAO Z,ZK 5 2+2 Czech
Lecturer:
Jan Kyncl (gar.), Martin Novotný (gar.), Pavel Kubalík
Tutor:
Jan Kyncl (gar.), Martin Novotný (gar.), Jiří Balcárek, Jaroslav Borecký, Jaroslav Crhonek, Martin Daňhel, Radek Dobiáš, Kateřina Hyniová, Jakub Klouda, Martin Kohlík, Pavel Kubalík, Jan Pospíšil, Michal Prokš, Miroslav Skrbek, David Toman, Tomáš Vaňát, Pavel Vít, Petr Vojta
Supervisor:
Department of Digital Design
Synopsis:

Students get the fundamental understanding of technologies underlying electronic digital systems. They understand the basic theoretical models and principles of functionality of transistors, gates, circuits, and conductors. They are able to design simple circuits and evaluate circuit parameters. They understand the differences between analog and digital modes of electronic devices.

Requirements:

High-School level of mathematics and physics.

Syllabus of lectures:

1. Lumped vs. distributed parameters, transitions. State variables and circuit parameters (resistance, capacity, inductance). Current and voltage sources, connections, elements of circuit equations.

2. Replacing elements with current or voltage sources, circuit equations. Serial and parallel connection of equivalent elements. Numerical mathematics for solving equations that describe electric circuits.

3. Circuit equations, node voltage method, loop current method. DC circuits.

4. Digital abstraction, Boolean logic, Boolean functions (negation, NAND, NOR, AND, OR, sum-of-products), N-type and P-type switches, implementing logic gates using N-type and P-type switches.

5. Semiconductors, properties. Basic nonlinear elements in electric circuits (diodes, ...), characteristics, linearization.

6. MOSFET. MOSFET as an amplifier. MOSFET as a switch.

7. Structures of logic elements (CMOS technology, physical structure, logic gates, multiplexors, tri-state drivers, level flip-flops, edge flip-flops).

8. Sinusoidal steady state with a single frequency, transfer.

9. Resonant circuits; time diagrams of variables including powers. Measurements, example of tuning.

10. Homogeneous transmission line (approaches, basic termination methods, etc.). Signal delay in digital systems. Symmetric and asymmetric transmission lines.

11. Power. Mean and RMS value. Reactive power. Energy and power in digital systems (energy and power in a simple RC circuit, energy consumption in logic gates, NMOS, CMOS).

12. Controlled supplies and magnetically coupled circuits. Transformers.

13. Operational amplifiers, comparators (properties, simple op-amp circuit, input and output impedance, examples, RC circuits with op-amps, saturated op-amp, positive feedback, two-port network).

Syllabus of tutorials:

1. Introduction to SW Mathematica, solving of various types of equations.

2. First-order transients; oscilloscope, numerical mathematics, NDSolve.

3. Complex circuit: measurements, calculation.

4. DC circuits; digital abstraction.

5. Semiconductors.

6. Transistor.

7. Structures of logic elements.

8. Single-frequency sinusoidal steady state, inverse task (determination of circuit parameters by measurement and calculation).

9. Resonant circuits: equations, responses. Measurement and tuning. Fourier (numerical and experimental tasks).

10. Homogeneous transmission lines (approaches, basic examples of termination etc.), reflections, adjustment. Signal delays.

11. Power. Mean and effective value. Reactive power.

12. Energy and power in digital systems.

13. Operational amplifiers.

Study Objective:

The aim of the module is to teach the fundamentals of digital and analog circuits, as well as basic methods of analyzing them. Students learn what do computer structures look like at the lowest level. They are introduced to the function of a transistor. They will know why processors generate heat, why is cooling necessary, and how to reduce the consumption; what are the limits to the maximum operating frequency and how to raise them; why does a computer bus need to be terminated, what happens if it is not; what does (in principle) a computer power supply look like. In the labs, students will perform measurements on actual circuits. They will also design circuits and verify some of their designs hans-on. Mathematica software is used to solve problems.

Study materials:

https://edux.fit.cvut.cz/courses/BI-CAO/

Note:
Further information:
https://edux.fit.cvut.cz/courses/BI-CAO/
Time-table for winter semester 2011/2012:
06:00–08:0008:00–10:0010:00–12:0012:00–14:0014:00–16:0016:00–18:0018:00–20:0020:00–22:0022:00–24:00
Mon
roomTH:A-930
Novotný M.
Vít P.

09:15–10:45
(lecture parallel2
parallel nr.202)

Dejvice
FIT PC ucebna
roomTH:A-930
Vít P.
Crhonek J.

11:00–12:30
(lecture parallel2
parallel nr.206)

Dejvice
FIT PC ucebna
roomTH:A-930
Vaňát T.
Vít P.

12:45–14:15
(lecture parallel2
parallel nr.205)

Dejvice
FIT PC ucebna
roomTH:A-930
Vaňát T.
Borecký J.

14:30–16:00
(lecture parallel1
parallel nr.209)

Dejvice
FIT PC ucebna
roomTH:A-930
Vaňát T.
Borecký J.

16:15–17:45
(lecture parallel2
parallel nr.208)

Dejvice
FIT PC ucebna
Tue
roomTH:A-930
Kubalík P.
Daňhel M.

09:15–10:45
(lecture parallel1
parallel nr.105)

Dejvice
FIT PC ucebna
roomTH:A-930
Kubalík P.
Daňhel M.

11:00–12:30
(lecture parallel1
parallel nr.106)

Dejvice
FIT PC ucebna
Fri
roomTH:A-930
Balcárek J.
09:15–10:45
(lecture parallel2
parallel nr.203)

Dejvice
FIT PC ucebna
roomTH:A-930
Balcárek J.
Crhonek J.

11:00–12:30
(lecture parallel2
parallel nr.204)

Dejvice
FIT PC ucebna
roomTH:A-930
Skrbek M.
Hyniová K.

12:45–14:15
(lecture parallel2
parallel nr.201)

Dejvice
FIT PC ucebna
roomTH:A-930
Hyniová K.
Skrbek M.

14:30–16:00
(parallel nr.103)
Dejvice
FIT PC ucebna
roomTH:A-930
Dobiáš R.
Vojta P.

16:15–17:45
(lecture parallel1
parallel nr.107)

Dejvice
FIT PC ucebna
roomTH:A-930
Dobiáš R.
18:00–19:30
(lecture parallel1
parallel nr.108)

Dejvice
FIT PC ucebna
Thu
roomTH:A-930
Pospíšil J.
09:15–10:45
(parallel nr.109)
Dejvice
FIT PC ucebna
roomT9:105
Kyncl J.
Novotný M.

11:00–12:30
(lecture parallel2)
Dejvice
Posluchárna
roomT9:105
Novotný M.
Kyncl J.

12:45–14:15
(lecture parallel1)
Dejvice
Posluchárna
roomTH:A-930
Novotný M.
Prokš M.

16:15–17:45
(lecture parallel2
parallel nr.207)

Dejvice
FIT PC ucebna
Fri
roomTH:A-930
Kohlík M.
07:30–09:00
(lecture parallel1
parallel nr.104)

Dejvice
FIT PC ucebna
roomTH:A-930
Kohlík M.
09:15–10:45
(lecture parallel1
parallel nr.101)

Dejvice
FIT PC ucebna
roomTH:A-930
Kohlík M.
11:00–12:30
(lecture parallel1
parallel nr.102)

Dejvice
FIT PC ucebna
Time-table for summer semester 2011/2012:
Time-table is not available yet
The course is a part of the following study plans:
Generated on 2012-7-9
For updated information see http://bilakniha.cvut.cz/en/predmet1110806.html