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CZECH TECHNICAL UNIVERSITY IN PRAGUE
STUDY PLANS
2011/2012

Computer Architecture

The course is not on the list Without time-table
Code Completion Credits Range
E36APS Z,ZK 5 2+2s
The course is a substitute for:
Architecture of Computer Systems (XE36APS)
Lecturer:
Tutor:
Supervisor:
Department of Computer Science and Engineering
Synopsis:

Architekture of sequential computers, performance evaluation and CPU performance equation, benchmarks, architektura na úrovni souboru instrukcí, RISC vs CISC, proudové zpracování instrukcí v RISC a CISC procesorech, hazardy a jejich předcházení, paralelismus na úrovni instrukcí, hierarchie paměťového systému, návrh skrytých pamětí, HW podpora pro virtualizaci paměti, vektorové procesory, architektura multiprocesorů se sdílenou pamětí, koherence a konsistence sdílené paměti, koherenční protokoly, HW prostředky pro synchronizaci přístupu do sdílené paměti, propojovací sítě, multiprocesory s distribuovanou pamětí.

Requirements:
Syllabus of lectures:

1. Introduction to computer architecture, performance evaluation

2. Architecture of single-processor computers

3. Memory systems, virtual memory, dynamic address translation, TLB

4. Cache structure, control, addressing systems

5. Processor-peripherals interface, interrupts, DMA

6. CISC processors, personal computers

7. Pipelining, superscalar mode, vector processors

8. RISC processors, workstations

9. Parallel systems, redundant systems, VLIW

10. Interconnection networks

11. Multiprocessor systems (MIMD)

12. Array processors (SIMD), associative processors

13. Data flow systems, systolic arrays, neural networks

14. Future development of computer architecture

Syllabus of tutorials:

1. Semestral project assignments

2. Specification of topics, distribution of materials

3. - 7. Elaboration and presentation of semestral projects

8. Cache memory - seminar

9. Instruction pipeline - design

10. - 11. Simulation of DLX in laboratory

12. Reserve

13. Evaluation, assessment

Study Objective:
Study materials:

[1] Hwang, K., Briggs, F.A.: Computer architecture and parallel processing. McGraw-Hill, New York 1984

[2] Hennessy, J.L., Patterson, P.A.: Computer architecture: a quantitative approach. Morgan Kaufman Publishers, San Mateo 1990

Note:
Further information:
No time-table has been prepared for this course
The course is a part of the following study plans:
Generated on 2012-7-9
For updated information see http://bilakniha.cvut.cz/en/predmet11055904.html