Automated Design of Digital Systems

Lecturer:

Tutor:

Supervisor:

Department of Computer Science and Engineering

Synopsis:

Electronic Design Automation (EDA) is a must in today's electronic industry. The software involved is demanding: voluminous data, NP-hard algorithms, and high quality user interface for professional use. The course brings information necessary for successful application of such systems. Typical design flows, software architectures and algorithmic problems are studied.

Requirements:

Syllabus of lectures:

1. Contemporary technologies for digital circuits, and manufacturing relationships

2. The evolution of design techniques, central terms, and quantitative requirements

3. Trends in design flow and their influence on EDA, user interface issues

4. The organization of data in EDA, typical terms, implementation

5. Physical design: routing

6. Physical design: placement and decomposition

7. Logic level design: technology mapping

8. Logic level design: optimization and decomposition

9. Synthesis: main characteristics, levels, formalism used for design description

10. Behavioral synthesis: scheduling

11. Behavioral synthesis: allocation and assignment

12. Verification: main characteristics, application of formal logic

13. Verification: application of decision diagrams

14. Spare

Syllabus of tutorials:

1. An overview of technologies used in the labs, professional orientation of participants

2. Lab practice: polygon-level design (INTROMIC)

3. Lab practice: physical design (XACT)

4. Lab practice: HDL synthesis (ABEL etc.)

5. Meeting with professional designers, discussion of work flow and design examples

6. Experiments with placement and routing (XACT, FORMICA)

7. Experiments with mapping (XACT)

8. OctTools and SISL: logic level design, an example of typical university software system

9. Experiments in combinatorial minimization (Espresso)

10. Experiments in sequential circuit optimization I (SIS)

11. Experiments in sequential circuit optimization II (SIS)

12. Synthesis

13. Presentation of semestral projects

14. Presentation of semestral projects

Study Objective:

Study materials:

[1] Lengauer, T.: Combinatorial Algorithms for Integrated Circuit Layout. Wiley, 1990

[2] Ku, D.C., De Micheli, G.: High Level Synthesis of ASICs Under Timing and Synchronization Constraints. Kluwer, Boston 1992

Note:

Further information:

No time-table has been prepared for this course

The course is a part of the following study plans: