PLD-Architecture and Application

Lecturer:

Tutor:

Supervisor:

Department of Microelectronics

Synopsis:

Programmable logic devices (PLD): types, principles, internal architecture, and production technologies. SPLDs (PAL, GAL, PLA), CPLD devices and field programmable gate arrays (FPGA): architecture of internal elements, interconnections, development systems, configuration and reconfiguration. Configurable Systems on Chip. PLD design usig VHSIC HDL (VHDL): synthesis, mapping and testing. Practical design of CPLD and FPGA using Xilinx ISE.

Requirements:

Syllabus of lectures:

1. ASIC and Programmable Logic Devices (PLD) - history and trends.

2. Basic properties and architecture of PLD. PLD Design: methodology and CAD tools.

3. Hardware Description Languages (ABEL, VERILOG, VHDL). VHDL basic syntax.

4. VHDL - combination function blocks.

5. VHDL - sequential function blocks, hierarchy.

6. Interconnection technologies - bipolar, SRAM CMOS, EPROM, EEPROM and FLASH.. SPLD circuits (PAL and GAL).

7. Architecture blocks and interconnections in CPLDs and FPGAs.

8. I/O blocks of CPLDs and FPGAs, configuration and test (JTAG).

9. Complex Programmable Logical Devices (Lattice, Xilinx, Altera).

10. Field Programmable Gate Arrays (Xilinx, Altera, Actel).

11. Principles of digital design for CPLDs and FPGAs, testability.

12. Design with IP cores.

13. Configurable Systems on Chip (CSoC) - ARM and Triscend.

14. Programmable analogue circuits and interconnection arrays.

Syllabus of tutorials:

1. Introduction, design of digital system in PAL made by hand.

2. CAD Tools for PLD design: Xilinx ISE.

3. Synthesis of simple combination circuits in VHDL

4. Synthesis and test of simple combination circuits in VHDL

5. Synthesis and test of simple sequential circuits in VHDL

6. VHDL - hierarchical design, mapping into CPLD Xilinx CoolRunner.

7. Project I. - digital system design based on XCR3064.

8. Project I. - digital system design based on XCR3064.

9. Project II. - creation of project teams, application of IP cores.

10. Project II. - digital system design based on CPLD/FPGA.

11. Project II. - digital system design based on CPLD/FPGA.

12. Project II. - digital system design based on CPLD/FPGA.

13. Project II. - digital system design based on CPLD/FPGA.

14. Presentation of projects, account.

Study Objective:

Study materials:

[1] Chan, P.K., Mourad, S.: Digital design using FPGA. Prentice Hall, 1994

Note:

Further information:

No time-table has been prepared for this course

The course is a part of the following study plans:

• Biomedicínské inženýrství - inženýrský blok (elective specialized course)
• Biomedicínské inženýrství - inženýrský blok (elective specialized course)