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CZECH TECHNICAL UNIVERSITY IN PRAGUE
STUDY PLANS
2011/2012

Design of Integrated Circuits

The course is not on the list Without time-table
Code Completion Credits Range Language
34NIO Z,ZK 4 2+2s Czech
The course is a substitute for:
Integrated Circuits Design (X34NIO)
Lecturer:
Tutor:
Supervisor:
Department of Microelectronics
Synopsis:

Importance and economic aspects of IC. Design of basic integrated structures: current mirror, differencional stage, current and voltage references , basic amplifiers. Design methodologies: gate arrays, standard cells and functional blocks, full- custom design. Design hierarchy: behavioral description, logic and electric aldesign, simulation, layout capture, verification. CAD tools for IC design: HDL, simulators, layout editors, structural synthesis, silicon compilers. IC testing.

Requirements:
Syllabus of lectures:

1. Scaling-down ICs, reliability of ICs

2. IC design-flow, methods of design

3. Full-custom IC design, optimisation of building blocks

4. Layout sythesis, parametric cells, symbolic design

5. Principles of place and route techniques, power supply and dissipation in ICs

6. Analogue ICs design, basic analogue building blocks

7. Analogue ICs design, mixed analogue-digital circuits

8. Layout design, signal interference, parasitic effects in analogue ICs

9. Standard cells and functional blocks, chip architecture, libraries

10. Gate arrays, chip architecture, libraries

11. Automated design tools, silicon compilers

12. Design verification, mask generation

13. ICs testing and reliability, testers

14. Testing, methods of fault localisation, test analysis

Syllabus of tutorials:

1. CADENCE design system

2. CMOS design kits for CADANCE

3. Simulation of analogue ICs

4. Parameters of logic gates

5. Simulation of digital ICs

6. Simulation of mixed-mode ICs

7. Design rules

8. Layout design

9. Architecture of ICs

10. Placement and routing of blocks

11. Power-supply and dissipation on the chip

12. Signal integrity and interference on the chip

13. Verification and testing of ICs

14. Final assessment

Study Objective:
Study materials:

[1] Pucknell, D., Eshraghian, K.: Basic VLSI Design. Prentice Hall, 1988

[2] Weste, N., Eshraghian, K.: Principles of CMOS VLSI Design. Add.-Wesley, 1992

Note:
Further information:
No time-table has been prepared for this course
The course is a part of the following study plans:
Generated on 2012-7-9
For updated information see http://bilakniha.cvut.cz/en/predmet11007004.html