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CZECH TECHNICAL UNIVERSITY IN PRAGUE
STUDY PLANS
2011/2012

Digital Control of Telecommunications Systems

The course is not on the list Without time-table
Code Completion Credits Range
32CRT Z,ZK 4 2+2s
The course is a substitute for:
Digital Control of Telecommunications Systems (X32CRT)
Lecturer:
Tutor:
Supervisor:
Department of Telecommunications Engineering
Synopsis:

The subject was developed to provide the communication engineers with techniques for the analysis and synthesis of switching circuits and systems. With the advent of electronic digital switching systems and his store program control it was soon seen that some knowledge of switching theory was useful in logical design.

Requirements:
Syllabus of lectures:

1. General properties of sequential circuits. Synchronous and asynchronous circuits

2. Formal description of the mode operation. Memory devices

3. Synthesis of sequential switching circuits, application in telecommunication systems

4. The flow table, equivalent states, unique reduction. Secondary assignment methods

5. Synthesis of excitation and output functions

6. Relay contact chain as a receiver of additive code

7. Memory elements, flip - flops, Master -Slave

8. Counters and registers. Application of register circuits in control

9. Synthesis of counters and shift registers

10. Conventional and microprogramming principles of control

11. Microprogram sequence control circuits, application in the control

12. Synthesis of microprogram automata with wired logic

13. Synthesis of microprogram automata with program logic

14. Application of microprogram automata for control of telecommunications systems

Syllabus of tutorials:

1. Introduction. Safety instructions and laboratory rules. Introducing information

2. CMOS 4000 circuits. Application of CMOS circuits. Phase lock MHB 4046

3. Phase lock with MHB 4046. Design and realization

4. Logical elements EXCLUSIVE-OR. Displaying elements. Code translators. Multiplexers

5. Sequential logical circuits. Minimizing the number of internal states - synchronous SLC

6. Minimizing the number of internal states - asynchronous SLC. Designing a Moore SLC

7. Realization of a Moore SLC

8. Synchronous and asynchronous counters. Shift registers in technology SSI, MSI, LSI

9. The ROM, PROM, EPROM and RWM memories. Realization of a ROM memory model

10. Converters A/D and D/A. Application of MDAC08 converter in D/A conversion

11. A/D converters. Using a microprocessor for D/A and D/A conversion

12. Microprogramme automats (MPA) and their application, design

13. Realization of MPA

14. Assessments

Study Objective:
Study materials:

Recommended literature will be specified by lecturer.

Note:
Further information:
No time-table has been prepared for this course
The course is a part of the following study plans:
Generated on 2012-7-9
For updated information see http://bilakniha.cvut.cz/en/predmet11001604.html