Application of Programmable Circuits 2

Lecturer:

Tutor:

Supervisor:

Department of Circuit Theory

Synopsis:

Architectures and Application of Programmable Devices 2 subject is bound to AP1 study, gives the student a possibility to extend knowledge in area of more sophisticated programmable logic devices as complex PLD and FPGA. Students have a chance to use different design systems and try some design results not only with simulator, but on hardware kits, too. These kits are available for Lattice ispLSI and Xilinx FPGA devices.

Requirements:

Syllabus of lectures:

1. Introduction, PLD architecture

2. Design flow, design systems

3. Architecture and application of complex PLD

4. Architecture of complex PLD Lattice ispLSI

5. Architecture of complex PLD Lattice ispGDS, GDX, analog circuits ispPAC

6. Design systems for Lattice PLD, VHDL language

7. Architecture of CPLD Xilinx

8. FPGA Xilinx 3000, 4000, 5200, Spartan

9. Altera MAX, FLEX, APEX circuits

10. CPLD and FPGA Atmel

11. CPLD Cypress Delta, Ultra, FLASH

12. FPGA Actel

13. Programming of devices, programmers, algorithms

14. New PLD and FPGA architectures

Syllabus of tutorials:

1. Introduction, PLD architecture

2. Design flow, design systems examples, exercise

3. Using of complex PLD

4. Practical solutions with Lattice CPLD ispLSI and ispGDS

5. Individual work with design systems for Lattice circuits

6. Individual work with design systems and test equipment for Lattice circuits

7. Individual work with design systems and test equipment for Lattice circuits

8. Usage of FPGA XILINX, design system introduction

9. Individual work with design systems for FPGA XILINX

10. Individual work with design systems for FPGA XILINX, design verification and functional tests

11. Individual work with design systems for FPGA XILINX, design verification and functional tests

12. Individual work with design systems for FPGA XILINX, design verification and functional tests

13. Usage of FPGA Actel, design system introduction

14. New PLD and FPGA architectures and design systems

Study Objective:

Study materials:

1. Databooks Lattice, Xilinx, Actel, AMD, Philips

2. Web pages with datasheets and tutorials on http://noel.feld.cvut.cz/APO

Note:

Further information:

No time-table has been prepared for this course

The course is a part of the following study plans:

• Elektronika-inženýrský blok (compulsory elective course)
• Elektronika-inženýrský blok (compulsory elective course)