Architectures of Computer Systems

Přednášející:

Róbert Lórencz (gar.), Josef Hlaváč

Cvičící:

Josef Hlaváč

Předmět zajišťuje:

katedra počítačových systémů

Anotace:

Students understand computer architectures with general-purpose processors at the level of machine instructions, with emphasis on instruction pipelining and memory hierarchy. They know the main concepts of RISC and CISC architectures. They learn how modern computers work and how they are constructed. They learn about the techniques that today's processors use to increase program execution speed. They are able to optimize their programs to fully exploit the processor. They get an idea about the principles of modern trends in computer architectures and how will they affect software. They also understand the architectures of vector processors, their use in today's microprocessors. They understand the principles and architectures of shared-memory multiprocessor systems and the issues of memory consistency.

Požadavky:

Basic knowledge of combinatorial and sequential logic circuits. Knowledge how a computer operates at the machine instruction level, programming in assembler. Programming in C, purpose of a high-level language compiler.

Osnova přednášek:

1. Computer performance evaluation, quantitative principles of computer architectures.

2. Instruction set architectures, RISC and CISC.

3. Introduction to pipelining, integer pipeline of a RISC processor.

4. Advanced pipelining, hazard resolving, multicycle instructions.

5. Superscalar and superpipelined processors, pipelining of complex instructions.

6. Dynamic scheduling and dynamic branch prediction, instruction-level parallelism and its limits.

7. [3] Memory hierarchy - cache, main memory, virtual memory.

8. Data-level parallelism, vector and SIMD architectures.

9. Shared memory multiprocessors, coherency and consistency.

10. Processor synchronization in multiprocessor systems with shared memory.

11. Multiprocessor systems with distributed memory.

Osnova cvičení:

1. Computer performance evaluation.

2. Measurement of computer performance with benchmark sets.

3. Instruction set of DLX, the role of compiler.

4. [2] Experiments with integer DLX pipeline.

5. [2] Simulation of pipelined DLX.

6. Presentations of completed assignments.

7. Cache design and simulation.

8. Cache performance simulation.

9. [2] Simulation of DLXV.

10. MESI protocol simulation.

Cíle studia:

Students learn how modern computers work and how they are constructed. Particular attention is given to the techniques of controlling instruction processing at the microarchitecture level and to memory architecture and hierarchy. The module covers techniques used in modern processors to increase program execution speed, as well as methods of optimizing. The module also covers the trends that are to be expected in the area of computer hardware and software.

Studijní materiály:

1. Hennesy, J. L., Patterson, D. A. ''Computer Organization and Design: The Hardware/Software Interface. Third Edition, Revised''. Morgan Kaufmann, 2007. ISBN 0123706068.

2. Hennesy, J. L., Patterson, D. A. ''Computer Architecture: A Quantitative Approach, Third Edition''. Morgan Kaufmann, 2002. ISBN 1558605967.

Poznámka:

Rozsah=prednasky+proseminare+cviceni2p+2c, Prednasejici: doc. Ing. Róbert Lórencz CSc.

Další informace:

Pro tento předmět se rozvrh nepřipravuje

Předmět je součástí následujících studijních plánů:

• Information Technologies (povinný předmět oboru)
• Computer Engineering (povinný předmět oboru)
• Computer Science (povinný předmět oboru)
• Informatics (VO)