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ČESKÉ VYSOKÉ UČENÍ TECHNICKÉ V PRAZE
STUDIJNÍ PLÁNY
2011/2012

Testing and Reliability

Předmět není vypsán Nerozvrhuje se
Kód Zakončení Kredity Rozsah Jazyk výuky
MIE-TSP Z,ZK 4 2+1
Přednášející:
Petr Fišer (gar.)
Cvičící:
Petr Fišer (gar.)
Předmět zajišťuje:
katedra číslicového návrhu
Anotace:

Students gain knowledge about circuit testing and about methods for increasing reliability and security. They will get practical skills to be able to prepare a test set with the help of the intuitive path sensitization and to use an ATPG for automatic test generation. They will be able to design easy testable circuits and systems with built-in-self-test equipment. They will be able to analyze and control reliability and availability of the designed circuits.

Požadavky:

Digital IC design and VHDL.

Osnova přednášek:

1. Introduction to testing of digital circuits, defects, errors, faults, failures.

2. Test generation for combinational circuits, intuitive path sensitization.

3. Boolean difference, the D algorithm.

4. Fault diagnosis, test minimization, ATPG systems.

5. Memory, processor, FPGA, SoC testing.

6. IDDQ testing, testers, analog circuit testing.

7. Design for testability, IEEE 1149 and 1500 standards.

8. Built-in Self Test, test pattern generation, sample and response compression.

9. Reliability models, reliability indicators.

10. Reliability of mantained and redundant systems.

11. Fault-safe systems, totally self-checking circuits.

12. Reliability improving techniques, design of systems with enhanced reliability.

Osnova cvičení:

1. 1-3. Test pattern generation and optimization

2. 4-6. Individual project: Fault detection and localisation

3. 7. IEEE 1149 standard application

4. 8-11. Individual project: BIST design

5. 12-13. Individual project: Enhanced reliability system design

Cíle studia:

Students will gain an overview about circuit testing and about methods for increasing reliability and security. Students will understand the complexity of fault detection, fault localisation, reliability evaluation and enhancement by solving practical examples and projects. They will be able to optimize the trade-off between introduced redundancy and the measure of testability and security of the proposed system. Students will obtain a competence for getting a position of testing engineer in the teams working on complex digital designs.

Studijní materiály:

1. Novák, O., Gramatová, E., Ubar, R. ''Handbook of testing electronic systems''. Praha: Publishing House of CTU, 2005. ISBN 80-01-03318-X.

Poznámka:

Rozsah=prednasky+proseminare+cviceni2p+1c, Prednasejici: prof. Ing. Ondřej Novák CSc.

Další informace:
Pro tento předmět se rozvrh nepřipravuje
Předmět je součástí následujících studijních plánů:
Platnost dat k 9. 7. 2012
Aktualizace výše uvedených informací naleznete na adrese http://bilakniha.cvut.cz/cs/predmet1437306.html