Digital Signal Processing
Code | Completion | Credits | Range | Language |
---|---|---|---|---|
BD5B31CZS | Z,ZK | 4 | 14KP+6KC | Czech |
- Garant předmětu:
- Petr Pollák, Pavel Sovka
- Lecturer:
- Petr Pollák
- Tutor:
- Petr Krýže, Petr Pollák
- Supervisor:
- Department of Circuit Theory
- Synopsis:
- Requirements:
- Syllabus of lectures:
- Syllabus of tutorials:
- Study Objective:
- Study materials:
- Note:
- Further information:
- https://moodle.fel.cvut.cz/courses/BD5B31CZS
- Time-table for winter semester 2023/2024:
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06:00–08:0008:00–10:0010:00–12:0012:00–14:0014:00–16:0016:00–18:0018:00–20:0020:00–22:0022:00–24:00
Mon Tue Wed Thu Fri - Time-table for summer semester 2023/2024:
- Time-table is not available yet
- The course is a part of the following study plans:
-
- Electrical Enginnering, Electronics and Communications (compulsory elective course)
In order to register for the course BD5B31CZS, the student must have registered for the required number of courses in the group BEZBM no later than in the same semester.