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CZECH TECHNICAL UNIVERSITY IN PRAGUE
STUDY PLANS
2018/2019

Testing and Reliability

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Code Completion Credits Range Language
MI-TSP.16 Z,ZK 5 2+2 Czech
Lecturer:
Petr Fišer (guarantor)
Tutor:
Petr Fišer (guarantor), Martin Daňhel
Supervisor:
Department of Digital Design
Synopsis:

Students gain knowledge about circuit testing and about methods for increasing reliability and security. They will get practical skills to be able to prepare a test set with the help of the intuitive path sensitization and to use an ATPG for automatic test generation. They will be able to design easy testable circuits and systems with built-in-self-test equipment. They will be able to analyze and control reliability and availability of the designed circuits.

Requirements:

Digital IC design (BIE-SAP).

Syllabus of lectures:

1. Introduction, terminology, defects, faults

2. Test generation for combinational circuits

3. Automatic Test Patterns Generation algorithms (ATPG)

4. Sequential circuits testing, fault simulation

5. Dependability, increasing dependability

6. Dependability models, dependability computation

7. Design for testability

8. Sequential circuit testing - scan design

9. Interconnect testing, SoC and NoC testing

10. Built-in self-test (BIST)

11. Test compression

12. Memory and FPGA testing

Syllabus of tutorials:

1. Introduction to the course

2. Faults in digital circuits

3. D-Algorithm, Boolean Differential Calculus

4. Tests generation for combinational circuits

5: Testing of sequential circuits

6. ATPG Atalanta

7. Reliability Block Diagrams

8. Markov reliability models

9. Fault Tree Analysis and other reliability models

10. Reliability standards

11. Assessment test, Design of the BIST

12. Assessment

Study Objective:

Students will gain an overview about circuit testing and about methods for increasing reliability and dependability. Students will understand the complexity of fault detection, fault localisation, reliability evaluation and enhancement by solving practical examples and projects. They will be able to optimize the trade-off between introduced redundancy and the measure of testability and dependability of the proposed system. Students will obtain a competence for getting a position of testing engineer in the teams working on complex digital designs.

Study materials:

1. Novák, O., Gramatová, E., Ubar, R. ''Handbook of testing electronic systems''. Praha: Publishing House of CTU, 2005. ISBN 80-01-03318-X.

Note:
Further information:
https://moodle.fit.cvut.cz/courses/MI-TSP.16/
Time-table for winter semester 2018/2019:
06:00–08:0008:00–10:0010:00–12:0012:00–14:0014:00–16:0016:00–18:0018:00–20:0020:00–22:0022:00–24:00
Mon
Tue
roomTH:A-1342
Fišer P.
12:45–14:15
(lecture parallel1)
Thákurova 7 (FSv-budova A)
roomTH:A-1048
Daňhel M.
14:30–16:00
(lecture parallel1
parallel nr.101)

Thákurova 7 (FSv-budova A)
Servitova laborka
Fri
Thu
Fri
Time-table for summer semester 2018/2019:
Time-table is not available yet
The course is a part of the following study plans:
Data valid to 2019-03-22
For updated information see http://bilakniha.cvut.cz/en/predmet4657306.html