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CZECH TECHNICAL UNIVERSITY IN PRAGUE
STUDY PLANS
2018/2019

Systems on Chip

The course is not on the list Without time-table
Code Completion Credits Range Language
MI-SOC Z,ZK 4 2+1 Czech
Lecturer:
Tutor:
Supervisor:
Department of Digital Design
Synopsis:

Students gain key knowledge and skills in the design of large-scale digital systems. They will be familiar with architectures of such systems and communication among their parts. They will use an appropriate workflow to design these architectures, their hardware and software. They will also have knowledge of contemporary methods of large systems verification and fault-tolerant systems design.

Requirements:

Design and test of combinational and synchronous sequential digital circuits and corresponding workflows. System modeling and modeling languages. Basic overview of verification methods.

Syllabus of lectures:

1. A taxonomy and characteristics of systems on a chip (SoC). Common requirements to SoC. Implementation platforms, granularity.

2. Communications on the chip, latency, throughput, architectures.

3. Hardware-software decomposition, design space exploration.

4. System-level timing, scheduling algorithms, time-triggered architectures.

5. Real-time operating systems and their architectures, implementation of synchronization primitives, communication interfaces.

6. Real-time applications, fault-tolerant software.

7. Hardware timing and synchronization, cycle-accurate models, model refinement.

8. Networks on chip (NoC), routing protocols and their implementation.

9. Design reuse, third-party intellectual property cores, standard communication and test interfaces.

10. SoC verification methods. Assertions, Property Specification Language, model checking.

11. Verification by simulation, simulation cover monitoring and control, random stimuli method.

12. Verification of protocols, state machines, interfaces, data paths. Equivalence checking. Software verification. Software-hardware coverification.

13. Large-scale fault-tolerant systems. Fault-tolerance methods for hardware and software.

Syllabus of tutorials:

1. Practical HW/SW Co-Design (Xilinx Zynq)

2. Practical HW/SW Co-Design - implementations

3. Processor design in CODASIP

5. Consultations and implementations

6. Semestral projects for Zynq

7. Project review and discussion

Study Objective:

Modern highly integrated digital systems are designed to achieve high performance, small dimensions, and low energy consumption. The module brings knowledge required to design both the software and the hardware of such systems, because both areas are tightly coupled. Nevertheless, design is only a small part of the game. „We will die of verification“ was heard at conferences as early as in 2000, in reference to difficult verification of system correctness. Therefore, we present the contemporary state-of-the-art in this area, as it is necessary for verification engineers. The last part of the course is dedicated to the construction of dependable systems for critical applications.

Study materials:

1. Pasricha, S., Dutt, N. ''On-Chip Communication Architectures: System on Chip Interconnect''. Morgan Kaufmann, 2008. ISBN 012373892X.

2. Erbas, G. ''System-Level Modeling and Design Space Exploration for Multiprocessor Embedded System-on-Chip Architectures''. Amsterdam University Press, 2006. ISBN 9056294555.

Note:
Further information:
No time-table has been prepared for this course
The course is a part of the following study plans:
Data valid to 2019-03-23
For updated information see http://bilakniha.cvut.cz/en/predmet1431306.html