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CZECH TECHNICAL UNIVERSITY IN PRAGUE
STUDY PLANS
2023/2024
UPOZORNĚNÍ: Jsou dostupné studijní plány pro následující akademický rok.

Computer Structure and Architecture

The course is not on the list Without time-table
Code Completion Credits Range Language
AD7B14SAP Z,ZK 6 14+6c Czech
Garant předmětu:
Lecturer:
Tutor:
Supervisor:
Department of Electric Drives and Traction
Synopsis:

Digital computer units and their structure, function and hardware implementation: ALU, control unit, memory system, inputs, outputs, data storage and transfer.

Requirements:

http://motor.feld.cvut.cz/

course A7B14SAP

Syllabus of lectures:

1.Computer organization, units and their interface.

2.Data, storage and processing.

3.Representation of negative numbers, fix-point and floating point numbers

4.Logic functions, combinatorial components, gate level design.

5.Sequential components structure, description and realization.

6.Typical computer combinatorial and sequential components

7.Arithmetic operation realization.

8.Memory structures and construction principles

9.Computer memory system.

10.Input-output components, buses and communication.

11.Instruction set architecture and machine code.

12.Instruction cycle.

13.Control units.

14.CISC and RISC type processors

Syllabus of tutorials:

1.Number systems and conversions.

2.Representation of negative numbers and arithmetic operations.

3.Fix point and floating point numbers.

4.Combinatorial components design (gate level)

5.Sequential components realization

6.Logical circuits implementation I

7.Logical circuits implementation II

8.Arithmetic operations hardware realization

9.Memories.

10.Simple processor structure and machine code

11.Machine code design

12.Machine code debugging

13.. Assessment

Study Objective:
Study materials:

1. Course YE14SAP lectures

2. Mano, M.M.- Ciletti, M.D.: Digital Design 4ed, Prentice Hall, 2006.

3. Haskell, R.E.- Hanna, D.M.: Introduction to Digital Design Using Digilent

FPGA Boards, LBE Books, 2009.

4. Harris,D.M.-Harris,S.L.: Digital Design and Computer Architecture, Elsevier, 2007.

5. Microchip: PIC18F87J11 Family Data Sheet, 2009.

Note:
Further information:
No time-table has been prepared for this course
The course is a part of the following study plans:
Data valid to 2024-03-27
Aktualizace výše uvedených informací naleznete na adrese https://bilakniha.cvut.cz/en/predmet1391406.html