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CZECH TECHNICAL UNIVERSITY IN PRAGUE
STUDY PLANS
2019/2020

Digital Engineering

The course is not on the list Without time-table
Code Completion Credits Range Language
AE2B99DIT Z,ZK 5 2+2L
Lecturer:
Tutor:
Supervisor:
Department of Telecommunications Engineering
Synopsis:

In this course, students will learn design principles for combinational and sequential digital circuits, using TTL components as well as field programmable gate arrays. The functional design using standard mathematical description and VHDL will be used for designing and realization of various digital circuits. The laboratory classes will be arranged as a set of laboratory tasks and practical examples. Some laboratory lessons will be focused on VHDL and its application for realization of basic digital circuits using FPGAs, their simulations and emulations as well as creating more advanced digital blocks.

Requirements:

The prerequisite is the knowledge on basic mathematic operations at the high school level.

Syllabus of lectures:

1. Binary number system. Operations in binary system. Binary codes (BCD, Gray).

2. Boolean algebra. Truth tables. De Morgan transformations. Logic functions.

3. Implementation of logic functions, K- maps, logic gates.

4. Larger (5 and 6-variable) Karnaugh maps for minimization of logic functions.

5. Technologies for HW implementation - TTL, CMOS. Combinational logic circuits.

6. Multiplexers and demultiplexers. Complete 4-bit and 8-bit multiplexer design.

7. Equality comparator, 3-state function. Combinational decoder.

8. Sequential logic circuits. Finite state machine. Design stages.

9. Mealy machine, Mealy machine. Case studies.

10. Latching components and flip-flops. RS-latch, D-type flip-flop. Binary adders.

11. Programmable devices, FPGA, hardware description languages, VHDL.

12. Automatic regulation. Non-contradicting sequential logic. Registers, shifters.

13. Implementation of logical circuits in VHDL.

14. Summary for examination.

Syllabus of tutorials:

1. Introduction, introduction into laboratory tasks, conditions for credits.

2. Number systems, arithmetical operations in number systems.

3. Boolean algebra, logic functions, expression of logic functions.

4. Karnaugh maps. Minimization and implementation of logic functions.

5. Combinational logic circuits - design and implementation on FPGA (Schematics).

6. Multiplexers - design and implementation.

7. Test 1. Designing combinational logic circuits.

8. Sequential logic circuits, case studies.

9. Basic blocks in VHDL, modules, ports, signals.

10. RS-latch, D-type flip-flop. Binary adders.

11. Simulation of combinational circuits using VHDL.

12. Simulation of sequential circuits using VHDL.

13. Test II. Designing sequential logic circuits.

14. Assessment, credits.

Study Objective:

The goal of this course is to introduce combinational and sequential logic circuits implemented on TTL compoments as well as modern field programmable gate arrays programmed in VHDL.

Study materials:

[1] GREGG, J.: Ones and Zeros: Understanding Boolean Algebra, Digital Circuits, and the Logic of Sets (IEEE Press Understanding Science & Technology Series), 1998

[2] CHU, PONG P.: FPGA Prototyping by VHDL Examples: Xilinx Spartan-3 Version, Wiley-Interscience; 1 edition, 2008

[3] PEDRONI, V.: Circuit Design and Simulation with VHDL, MIT Press, 2010

[4] STANKOVIC, R., ASTOLA, J.: From Boolean Logic to Switching Circuits and Automata: Towards Modern Information Technology (Studies in Computational Intelligence), Springer, 2011

[5] WHITESITT, J.: Boolean Algebra and Its Applications (Dover Books on Computer Science), 2010

[6] FABRICIUS, E.: Digital Design and Switching Theory CRC Press; 1 edition, 1992

Note:
Further information:
https://moodle.fel.cvut.cz/courses/AE2B99DIT
No time-table has been prepared for this course
The course is a part of the following study plans:
Data valid to 2019-09-17
For updated information see http://bilakniha.cvut.cz/en/predmet12808304.html