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CZECH TECHNICAL UNIVERSITY IN PRAGUE
STUDY PLANS
2019/2020

Diagnostics and Reconfiguration of Programmable Circuits

The course is not on the list Without time-table
Code Completion Credits Range
XP36DRO ZK 4 2P+2S
Lecturer:
Tutor:
Supervisor:
Department of Computer Science
Synopsis:

The subject is aimed to help PhD students to understand better methods of reliability and availability improvement of SOC and NOC circuits built on FPGAs and ASICs.

Requirements:

Students have to present a lshort lecture dealing with the project results. After the presentation a discussion about further possibility improvements takes part.

Syllabus of lectures:

Building blocks in FPGAs, their main fault mechanisms. External FPGA tests, their realization and embedding int the life cycle of the circuit. Embedded diagnostic in FPGAs, LSFR-based test generators, test result evaluation (embedded analyzers, MISR). Implementation of self-checked and self-tested in FPGAs. Selection of safety codes, design of a completely self-checked code checker. Conditions for automatic configuration after failure, the choice of type and size of interchangeable modules. Setting redundancy level in dependence on fault intensity and the required reliability parameters.

Syllabus of tutorials:

Students solve individual project. The project is chosen in such a way that it can help students to improve reliability and availability of their designs.

Study Objective:
Study materials:

Novák, O, Gramatová, E., Ubar, R.: Handbook of Electronic Testing. Vydavatelství ČVUT, srpen 2005, ISBN 80-01-03318-X, 405 stran

Note:
Further information:
No time-table has been prepared for this course
The course is a part of the following study plans:
Data valid to 2019-10-18
For updated information see http://bilakniha.cvut.cz/en/predmet11845904.html