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CZECH TECHNICAL UNIVERSITY IN PRAGUE
STUDY PLANS
2018/2019

Computer Units

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Code Completion Credits Range Language
BI-JPO Z,ZK 5 2+2 Czech
Lecturer:
Alois Pluháček (guarantor)
Tutor:
Alois Pluháček (guarantor), Pavel Kubalík
Supervisor:
Department of Digital Design
Synopsis:

Students get knowledge of the internal structure and organization of computer or processor components and their interfacing with the environment, the organization of main memory and other internal memories (addressable, LIFO, FIFO, and CAM) and with design methodology for the control unit and controllers, basic principles of communication with peripheral devices and buses.

Requirements:

Basic knowledge of the structure and architecture of a digital computer, design principles for combinational and sequential circuits, binary arithmetic, the concept of computer memory.

Syllabus of lectures:

1. Computer structure and basic logic elements.

2. Binary addition and subtraction.

3. 2's complement representation.

4. Control unit and controllers - microprogrammed and wired.

5. Binary multiplication and division.

6. Memories and their principles

7. Organizations of memories - addressable, LIFO, FIFO, CAM.

8. Linear codes.

9. Cyclic codes.

10. I/O units and their control.

11. Buses - types, modes, arbitration.

12. Floating point representation - formats and operations.

13. Spare.

Syllabus of tutorials:

1. Number systems, conversions and operations.

2. Representations of negative numbers.

3. Simple processor - instructions, machine code, data part.

4. Simple processor - instruction cycle, interface.

5. Simple processor - microprogramming.

6. Simple processor - demonstration of a microprogram.

7. Wired controller design I.

8. Wired controller design II.

9. Linear codes.

10. Cyclic codes.

11. Design of a processor component on FPGA.

12. Demonstration of the designed processor component.

13. Spare seminar, assessment.

Study Objective:

This module teaches future computer engineers the way how to design their own processors for a specific purpose, what units must be contained in a processor or a computer, and how these units communicate. Everything is demonstrated in hands-on experiments with FPGA and simulators.

Study materials:

Hennesy, J. L., Patterson, D. A. ''Computer Architecture: A Quantitative Approach, Third Edition''. Morgan Kaufmann, 2002. ISBN 1558605967.

Tanenbaum, A. S. ''Structured Computer Organization (5th Edition)''. Prentice Hall, 2005. ISBN 0131485210.

Stallings, W. ''Computer Organization and Architecture: Designing for Performance (7th Edition)''. Prentice Hall, 2005. ISBN 0131856448.

Hamacher, C., Vranesic, Z., Zaky, S. ''Computer Organization''. McGraw-Hill, 2001. ISBN 0072320869.

Note:
Further information:
https://courses.fit.cvut.cz/BI-JPO/
Time-table for winter semester 2018/2019:
06:00–08:0008:00–10:0010:00–12:0012:00–14:0014:00–16:0016:00–18:0018:00–20:0020:00–22:0022:00–24:00
Mon
Tue
Fri
roomTH:A-1042
Kubalík P.
09:15–10:45
(lecture parallel1
parallel nr.101)

Thákurova 7 (FSv-budova A)
Hlavickova laborka
roomTH:A-1042
Kubalík P.
11:00–12:30
(lecture parallel1
parallel nr.102)

Thákurova 7 (FSv-budova A)
Hlavickova laborka
Thu
roomTH:A-s135
Pluháček A.
09:15–10:45
(lecture parallel1)
Thákurova 7 (FSv-budova A)
As135
Fri
Time-table for summer semester 2018/2019:
Time-table is not available yet
The course is a part of the following study plans:
Data valid to 2019-03-20
For updated information see http://bilakniha.cvut.cz/en/predmet1122806.html