Logo ČVUT
Loading...
CZECH TECHNICAL UNIVERSITY IN PRAGUE
STUDY PLANS
2011/2012

Digital Engineering

Login to KOS for course enrollment Display time-table
Code Completion Credits Range Language
AE2B99DIT Z,ZK 5 2+2L
Lecturer:
Petr Hampl (gar.), Jan Bičák (gar.), Michal Lucki (gar.)
Tutor:
Petr Hampl (gar.), Jan Bičák (gar.), Michal Lucki (gar.)
Supervisor:
Department of Telecommunications Engineering
Synopsis:

The aim of the course is to familirize students with the principles of both classical and programmable logic devices and their practical use in the design of digital systems.

Teaching digital circuits will be based on the classical description of logic gate use and a description of the VHDL language. In the context of the seminars, students will work with real logic gates, measure their static and dynamic properties. They will verify the function of digital circuits in the simulator and will implement them in the programmable gate array. The seminar will conclude with a project, in which students will explore the design and testing of a simple digital system using the programmable gate array.

Requirements:

Basics of electrical circuits and basics of algorithmisation.

Syllabus of lectures:

1.Digital circuits, basic concepts, information, number systems, codes

2.Combinational logic circuits - Boolean algebra, logic expressions, truth table, minimization, maps, design of combinational logic

3.VHDL language

4.Transients in combinational logic circuits - delay of signals, hazard states, means of hazard elimination

5.The basic functional blocks - decoder, multiplexer, demultiplexer, priority encoder, digital comparator, adder, subtractor, code converter

6.Asynchronous and Synchronous flip-flops, SR, T, D, JK, transformation of flip-flops, blocking

7.Registers and counters - data registers, shift registers, counters characteristics, asynchronous and synchronous counters, reseting, setting

8.Sequential logic circuits - transient and output functions, various forms of description finite state machine

9.Memory devices - terminology, parameters, serial and parallel memory, internal arrangement, the use of memory in combinational circuits

10.Programmable logic devices (PLD, CPLD)

11.Programmable gate arrays (PGA, FPGA)

12.Microprogram machine, microprocessor system and its use for the implementation of logic functions

13.Design of digital systems

14.Verification of digital systems

Syllabus of tutorials:

1. Introduction. Signal description, fundamentals of logic circuits.

2. Basic calculations in number systems with various bases.

3. Boolean algebra. Logic functions and their expression.

4. Algebraic minimization of logic functions.

5. Karnaugh maps method.

6. Quine-McCluskey method.

7. Realization of logic functions with logic gates.

8. Introduction to laboratory tasks.

9. Work with basic gates, measurement of static and dynamic characteristics.

10. Static hazard elimination.

11. Introduction to the development kit, solving a practical task.

12. Digital circuits simulation.

13. Laboratory report hand in, assesment.

14. Free time, (thursday's timetable).

Study Objective:

The aim of the course is to familirize students with the principles of both classical and programmable logic devices and their practical use in the design of digital systems.

Teaching digital circuits will be based on the classical description of logic gate use and a description of the VHDL language. In the context of the seminars, students will work with real logic gates, measure their static and dynamic properties. They will verify the function of digital circuits in the simulator and will implement them in the programmable gate array. The seminar will conclude with a project, in which students will explore the design and testing of a simple digital system using the programmable gate array.

Study materials:

[1]Brown, S. - Vranesic, Z. Fundamentals of Digital Logic with VHDL Design with CD-ROM. 2 ed., McGraw-Hill, 2004, 939 p., ISBN 07-249938-9

[2]Eugene D. Fabricius, Modern Digital Design and Switching Theory CRC Press; 1 edition (June 23, 1992), 496 pages, ISBN: 0849342120.

Note:
Time-table for winter semester 2011/2012:
06:00–08:0008:00–10:0010:00–12:0012:00–14:0014:00–16:0016:00–18:0018:00–20:0020:00–22:0022:00–24:00
Mon
roomT2:B3-700
Lucki M.
14:30–16:00
(lecture parallel1)
Dejvice
Laboratoř K332
roomT2:B3-812a
Hampl P.
16:15–17:45
(lecture parallel1
parallel nr.101)

Dejvice
Laboratoř K332
roomT2:B3-812a
Hampl P.
18:00–19:30
(lecture parallel1
parallel nr.102)

Dejvice
Laboratoř K332
Tue
Fri
Thu
Fri
Time-table for summer semester 2011/2012:
Time-table is not available yet
The course is a part of the following study plans:
Generated on 2012-7-9
For updated information see http://bilakniha.cvut.cz/en/predmet12808304.html