FPGA Applications
| Kód | Zakončení | Kredity | Rozsah | Jazyk výuky |
|---|---|---|---|---|
| AE0B38APH | KZ | 5 | 1+3L |
- Přednášející:
- Radek Sedláček (gar.)
- Cvičící:
- Radek Sedláček (gar.)
- Předmět zajišťuje:
- katedra měření
- Anotace:
-
After the short introduction into structure and technology of programmable circuits (especially the CPLD and FPGA), the lectures are devoted to the VHDL and its usage for simulation and synthesis of digital circuits. Laboratories are focused on CPLD and FPGA circuit applications and on the used of SW instruments for programmable hardware design and simulation. Within the larger project implemented in the second part of laboratories a complete device (system on the chip) is implemented in the FPGA or CPLD circuit. Students may choose from the list of project or they can bring their own (even a group projects are possible). Development boards with FPGA (or CPLD) are available.
- Požadavky:
- Osnova přednášek:
-
1. Programmable circuits, history and present.
2. Introduction into VHDL, design units.
3. Numbers, characters, strings.
4. Basic data types and operators.
5. Basic objects - constants, variables, signals.
6. Parallel and sequential domains.
7. Implementation of state automata.
8. Standard libraries, LPM library.
9. Procedures and functions.
10.Design of combinatorial and sequential circuits.
11.Instruments and methods for simulation.
12.Special internal structures (RAM, PLL, multipliers) and their usage.
13.Implementation of user libraries.
14.Implementation of micro programmed automata.
- Osnova cvičení:
-
1. Introduction in QUARTUS II, opening project
2. Logic and arithmetic functions in VHDL, programming in parallel domain.
3. Programming in sequential domain - processes, flip-flops and counters.
4. Design simulation using test vectors and test benches in ModelSim.
5. State automata - variants of VHDL implementation.
6. Usage of internal and external RAM in projects.
7. Individual or group project (audio player, computer game, simple VGA controller ?).
8. Project implementation.
9. Project implementation.
10.Project implementation.
11.Project implementation.
12.Project implementation.
13.Project implementation.
14.Final project presentation, assessment.
- Cíle studia:
- Studijní materiály:
-
1. Pedroni, V.A.: Digital Electronics and Design with VHDL. Morgan Kaufmann 2008, ISBN: 978-0123742704
2. Ashenden, P. J.: The Designer's guide to VHDL. Morgan
Kaufmann 2008. ISBN: 978-0-12-088785-9.
- Poznámka:
-
Rozsah výuky v kombinované formě studia: 7p+9l
- Rozvrh na zimní semestr 2011/2012:
-
06:00–08:0008:00–10:0010:00–12:0012:00–14:0014:00–16:0016:00–18:0018:00–20:0020:00–22:0022:00–24:00
Po Út St Čt Pá - Rozvrh na letní semestr 2011/2012:
- Rozvrh není připraven
- Předmět je součástí následujících studijních plánů: